• KIPS Transactions on Software and Data Engineering
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• v.6 no.8
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• pp.401-410
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• 2017

This paper proposes a method to generate test cases in an automatic manner, based on checklist containing test cases used for testing embedded systems. In general, the items to be tested are defined in a checklist. However, most test case generation strategies recommend to test a system with not only the defined test items but also various mutated test conditions. The proposed method parses checklist in Korean file and figures out the system inputs and outputs, and operation information. With the found information and the user defined test case generation strategy, the test cases are automatically generated. With the proposed method, the errors introduced during manual test case generation may be reduced and various test cases not defined in checklist can be generated. The proposed method is implemented and the experiment is performed with the checklist for an medical embedded system. The feasibility of the proposed method is shown through the test cases generated from the checklist. The test cases are adequate to the coverages and their statistics are correct.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.2
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• pp.201-206
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• 2010

PLCs are special purpose microcontrollers used in most automatic control systems such as plants, embedded systems, and intelligent buildings. LD is one of the most popular languages among PLC languages. For now LD programs are mainly verified by simulation and testing which has a lot of limitation. This paper describes how to translate a given LD program into an input of a model checker so that LD program is verified by model checking. We define formal semantics of LD programs and SMV models and specify a formal definition of the translation function which preserves semantics between LD programs and SMV models.