• Journal of the Institute of Electronics Engineers of Korea SP
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• v.39 no.2
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• pp.128-136
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• 2002

In this paper, we developed an acoustic echo canceller in real-time using TeakLite DSP Core, which will be placed in the vocoder chip of a mobile handset. Considering the limited computational capacity given to the acoustic echo canceller in a vocoder chip, we employed a FIR-type adaptive filter using a conventional NLMS algorithm. To begin with, we designed and implemented an acoustic echo canceller with floating-point format C-source code, and then converted it into fixed-point format through integer simulation. Then we programmed and optimized it in the assembler level to make it run ill real-time. After optimization procedure, the implemented echo canceller has approximately 624 words of program memory and 811 words of data memory. With 8 KHz sampling rate and 256 filter taps in the echo canceller that corresponds to 32 msec of echo delay, it requires 14.12 MIPS of computational capacity. For coverage of 16 msec echo delay, i.e., 128 filter taps, 9 MIPS is requited.

• The Journal of the Acoustical Society of Korea
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• v.30 no.5
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• pp.265-272
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• 2011

In most of the ISF (or LSF) based real time speech codec, SVQ (split vector quantization) method is used to decrease the quantizer complexity and memory size of codebook. However, it produces drawback that the level of correlation between code vectors can not be used during vector splits. This paper presents a new method of adaptive ISF vector quantization, which compensates the drawbacks of SVQ structured quantizer for wideband speech codec. In each different frame, the proposed method makes use of the correlation between splitted vectors by adaptively changing codebook distribution according to ordering property of ISF. The algorithm is evaluated in AMR-WB, and shows about 1.5 bit per frame improvement.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7A
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• pp.659-667
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• 2002

In this dissertation, in the Turbo Code used for error correction coding of the recent digital communication systems, we propose a new S-R interleaver that has the better performance than the existing block interleaver, and the Turbo Decoder that has the parallel concatenated New structure using the MAP algorithm. For real-time voice and video services over the third generation mobile communications, the performance of two proposed methods is analyzed by the reduced decoding delay using the variable decoding method by computer simulation over multipath channels of DS-CDMA system. Also, a Modified NCMA based on conventional NCMA is proposed to improve the channel efficiency in the mobile communication system, and is investigated over the multi-user environment of DS-CDMA system through computer simulation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.7
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• pp.3188-3193
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• 2012

It is important to search a pitch for vocoder. The major drawback to vocoders is their large computational requirements in searching a pitch and a codebook. In this paper, a simple method is proposed to improve the pitch searching process in the pitch filter almost without degradation of quality. The period of speech signal is emphasized by using Dual Pulse technique, the same type of autocorrelation method, in pitch search. Sometimes the incorrect pitch can be obtained by halving, doubling and trifling, To solve it, before searching a pitch, we estimate energy rate in a frame and compensate envelop of signal with it. By using the proposed algorithm in pitch search, its required computation are reduced and searching pitch is improved.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.2
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• pp.1-13
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• 1999

As the complexity of DSP (Digital Signal Processing) applications increases, the need for new architectures supporting efficient high-level language compilers also grows. By combining several DSP processor specific features, such as single cycle MAC (Multiply-and-ACcumulate), direct memory access, automatic address generation, and hardware looping, with a RISC core having many general purpose registers and orthogonal instructions, a high-performance and compiler-friendly RISC-based DSP processors can be designed. In this study, we develop a code-converter that can exploit these DSP architectural features by post-processing compiler-generated assembly code, and evaluate the performance effects of each feature using seven DSP-kernel benchmarks and a QCELP vocoder program. Finally, we also compare the performances with several existing DSP processors, such as TMS320C3x, TMS320C54x, and TMS320C5x.

• Journal of Service Research and Studies
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• v.6 no.3
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• pp.29-40
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• 2016

Since the late 20th century, there has been much effort to improve the market value of media contents which are commercialized in a digital format, by fusing digital data of video, audio, numerals, characters with IT technology together. Then by what criteria and methodologies could the market value for the drama "Sons of the Sun" or the animated film 'Frozen', often referred to in the meida, be estimated? In the circumstances there has been little or no research on the valuation framework of media contents and the status of their valuation system development to date, we propose a practical valuation models for various purposes such as contents trading, review of investment adequacy, etc., by formalizing and presenting a contents valuation framework for the four types of media of movies, online games, and broadcasting commercials, and animations. Therefore, we develope computational methods of cash flows which includes production cost by media content types, provide reference databases associated with key variables of valuation (economic life cycle, discount rates, contents contribution and royalty rates), and finally propose the valuation framework of media contents based on both income approach and relief-from-royalty method which has been applied to valuation of intangible assets so far.