• 한국신재생에너지학회:학술대회논문집
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• 2007.06a
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• pp.295-298
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• 2007

Reduction of optical losses in crystalline silicon solar cells by surface modification is one of the most important issues of silicon photovoltaics. Porous Si layers on the front surface of textured Si substrates have been investigated with the aim of improving the optical losses of the solar cells, because an anti-reflection coating(ARC) and a surface passivation can be obtained simultaneously in one process. We have demonstrated the feasibility of a very efficient porous Si ARC layer, prepared by a simple, cost effective, electrochemical etching method. Silicon p-type CZ (100) oriented wafers were textured by anisotropic etching in sodium carbonate solution. Then, the porous Si layers were formed by electrochemical etching in HF solutions. After that, the properties of porous Si in terms of morphology, structure and reflectance are summarized. The structure of porous Si layers was investigated with SEM. The formation of a nanoporous Si layer about 100nm thick on the textured silicon wafer result in a reflectance lower than 5% in the wavelength region from 500 to 900nm. Such a surface modification allows improving the Si solar cell characteristics. An efficiency of 13.4% is achieved on a monocrystalline silicon solar cell using the electrochemical technique.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.480-480
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• 2013

태양에너지는 신재생 에너지 중에서 무한한 에너지원으로서 태양에너지에 대한 활발한 연구가 이루어지고 있다. 그 중에서도 결정형 실리콘 태양전지에 대해 다양한 연구가 진행 중이다. 이러한 실리콘 태양전의 제작은 실리콘 식각 용액을 이용하여 기판의 절삭 손상된 부분을 식각한 후 텍스쳐링(texturing) 공정을 통해 표면의 흡수율을 높이고, 반면에 반사율을 감소시킨다. 텍스쳐링 공정이 끝난 후 도핑 공정을 통해 에미터(emitter)를 형성, 반사방지막을 증착, 기판의 전면과 후면에 페이스트를 바르고 스크린인쇄법으로 전극을 형성한 후 마지막으로 형성된 전극을 소성 공정을 통해 전극이 에미터와 접촉하면 태양전지가 완성된다. 하지만 텍스쳐링 공정을 통해 만들어진 피라미드 구조는 도핑공정을 하게 되면, 꼭짓점 부분의 균일한 도핑이 이루어지지 않는다. 이러한 균일하지 않은 공정으로 인해 전극 소성 공정에서 일부의 에미터층을 뚫어버리게 되므로 누설전류가 증가하게 된다. 그래서 본 논문에서는, 변환 효율을 개선시키기 위해 표면 구조와 반사방지막의 열처리 공정에 대한 연구를 하였다. 우선 피라미드 구조를 균일하게 만들었으며, 반사방지막 형성 후 열처리를 하여 소수 캐리어 수명을 증가시켰으며, 누설전류를 감소하였다. 균일한 도핑 및 전극 형성을 용이하게 하는 부드러운 피라미드 구조를 형성하기 위해 HND (HF：HNO3 : D.I wafer=5 : 100 : 100) 용액을 사용하여 식각하였다. 그 결과 직렬저항은 NHD용액을 사용하여 300초 동안 식각하였을 때 $1.284{\Omega}$ 낮아지는 결과를 얻을 수 있었으며, 도핑을 균일화하여 누설전류를 감소시킬 수 있었다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.5
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• pp.38-45
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• 1989

We have studied the electrical characteristics of the hydrogenated amorphous silicon (a-Si:H) ambiploar thin film transistors (TET'S)using 100ppm boron-doped a-Si:H as an active layer. The enhancement of drain current due to the double injection behavior has been observed in the p-channel operation of the TFT. The drain current decreases with time in streched exponential form when the gate voltage is positive. The result indicates that the dangling bonds created by electron accumulation show identical time dependence as the diffusion of hydrogen in the film. We observed the experimental evidence that the doping efficiency changes either when the gate bias is applied or when the light is illuminated on boron-doped a-Si:H.

• Journal of the Korean Society for Precision Engineering
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• v.27 no.2
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• pp.13-19
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• 2010

Due to the rapid spread of mobile handheld devices, industrial demands for micro-scale holes with a diameter of even smaller than $10{\mu}m$ in sapphire/silicon wafers have been increasing. Holes in sapphire wafers are for heat dissipation from LEDs; and those in silicon wafers for interlayer communication in three-dimensional integrated circuit (IC). We have developed a sapphire wafer driller equipped with a 532nm laser in which a cooling chuck is employed to minimize local heat accumulation in wafer. Through the optimization of process parameters (pulse energy, repetition rate, number of pulses), quality holes with a diameter of $30{\mu}m$ and a depth of $100{\mu}m$ can be drilled at a rate of 30holes/sec. We also have developed a silicon wafer driller equipped with a 355nm laser. It is able to drill quality through-holes of $15{\mu}m$ in diameter and $150{\mu}m$ in depth at a rate of 100holes/sec.

• Journal of the Korean Ceramic Society
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• v.40 no.1
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• pp.69-76
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• 2003

For lithium secondary microbattery anode, the tin oxide thin films with Si addition (0, 2, 6, 10, 20 ㏖%) were prepared with R.F. magnetron sputtering at substrate temperature of 30$0^{\circ}C$ and Ar:O$_2$=7:3 atmosphere. As Si addition amount increased, Si-O bonding density increased and Sn-O bonding density decreased. The addition of optimum Si amount led the decrease of Sn oxidation state so that the irreversible capacity reduced and cycle characteristic enhanced during charge-discharge test. SnO$_2$films with 6 ㏖% Si had the highest reversible capacity of 700 mAh/g after 100 cycles.

• Journal of the Korean Ceramic Society
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• v.40 no.1
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• pp.104-108
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• 2003

COF(Coefficient Of Friction), AE(Acoustic Emission), micro-cracks and crystal structure of the single crystalline silicon were investigated according to the induced normal load during scratching test. Scratching tests were performed with the loading rate of 100 N/min and various scratching speeds of 1, 3, 6, 10 mm/min from 0 up to 30 N of the maximum normal load. In consequence, COF, AE and crack density were observed to increase with increasing normal load or increasing scratching speed. Phase transformations from the silicon diamond structure to other structures were observed in the scratched grooves for the slow scratching speeds using micro-Raman spectroscopy.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.2 no.2
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• pp.53-62
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• 1992

In Zone Melting Recrystallization(ZMR) of SOl structure, thin silicon films have been recrystallized by artificial control of beam intensity profile which was obtained by tilting of upper elliptical reflector. Temperature profiles and gradients near solidification interface were calculated by numerical simulation for analysis of asymmetric line heating effect. The larger the tilting angle of the upper reflector, the larger the degree of supercooling at liquid and the interdefect spacing in thin silicon films. Major defects were continuous subgrainboundaries. Isolated threading dislocations were observed in the case of the film having low defect density. We have found that the thin silicon films were recrystallized into (100) textured single crystals by cross-sectional TEM and thin film X-ray diffraction analysis.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.6 no.4
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• pp.564-570
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• 1996

We have observed the red and blue luminescence from porous silicon (PS) without any rapid thermal oxidation. Aged porous silicon specimens prepared in dilute HF concentration, especially for the short duration of etching, display the increase of the blue band. The measured luminescence decay time at room temperature exhibits a decay time of about 100 ps and shows appreciably faster decay time than that of 20 K. No photoluminescence (PL) peak maximum shift is observed for the blue PL band at 77 K. However, the red PL band shows the blue shift and displays yellow luminescence at 77 K. The origin of red luminescence has some properties related to Si crystallites, whereas blue luminescence seems to be associated other than Si crystallites.

• Korean Journal of Materials Research
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• v.11 no.7
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• pp.556-561
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• 2001

We prepared a new a SOS(silicon-on-silicide) wafer pair which is consisted of Si(100)/1000$\AA$-NiSi Si (100) layers. SOS can be employed in MEMS(micro- electronic-mechanical system) application due to low resistance of the NiSi layer. A thermally evaporated $1000\AA$-thick Ni/Si wafer and a clean Si wafer were pre-mated in the class 100 clean room, then annealed at $300~900^{\circ}C$ for 15hrs to induce silicidation reaction. SOS wafer pairs were investigated by a IR camera to measure bonded area and probed by a SEM(scanning electron microscope) and TEM(transmission electron microscope) to observe cross-sectional view of Si/NiSi. IR camera observation showed that the annealed SOS wafer pairs have over 52% bonded area in all temperature region except silicidation phase transition temperature. By probing cross-sectional view with SEM of magnification of 30,000, we found that $1000\AA$-thick uniform NiSi layer was formed at the center area of bonded wafers without void defects. However we observed debonded area at the edge area of wafers. Through TEM observation, we found that $10-20\AA$ thick amourphous layer formed between Si surface and NiSix near the counter part of SOS. This layer may be an oxide layer and lead to degradation of bonding. At the edge area of wafers, that amorphous layer was formed even to thickness of $1500\AA$ during annealing. Therefore, to increase bonding area of Si NiSi ∥ Si wafer pairs, we may lessen the amorphous layers.

• Proceedings of the Korean Society Of Semiconductor Equipment Technology
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• 2005.05a
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• pp.111-115
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• 2005

광 도파관 제작을 위한 마스터를 (100), (110) 실리콘 웨이퍼를 이용하여 제작하였다. DRIE와 화학적 습식 식각을 이용하여 사각형 모양의 부드러운 표면을 가진 마스터를 구현하였다. 식각된 패턴의 거칠기는 광 도파관을 제작할 수 있을 정도로 충분히 작았다. 마스터와 광 도파관의 분리를 용이하게 하기 위하여 마스터에 산화막을 형성하고 PFAS를 도포함으로써 HIBRIMERs 광 도파관을 성공적으로 제작할 수 있었다.