• Journal of the Korean Chemical Society
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• v.38 no.7
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• pp.473-479
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• 1994

Tungsten thin film was deposited on p-(100) silicon substrate by using the LPCVD(low pressure chemical vapor deposition) technique. $WF_6$ was used as a source gas for tungsten and $SiH_4$ was used as a reducing gas for $WF_6$. Tungsten thin film was deposited by either SiH4 or Si substrate reduction of $WF_6$ under cold-wall condition and it was deposited by $SiH_4$ reduction of $WF_6$ under hot-wall condition. The crystal structure of deposited thin film under both conditions were identified to be bcc (body centered cubic). The physical and electrical properties of deposited thin films were investigated. The deposited film under hot-wall condition changed to $WSi_2$ film by the annealing under $800^{\circ}C.$ From the experimental results and theoretical considerations, the change of the crystal structure of the thin film by annealing was discussed. $WSi_2$ thin film, which was known to have good compatibility with Si substrate, could be produced under hot-wall condition although the film properties were superior under cold-wall condition.

• Resources Recycling
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• v.16 no.5
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• pp.41-45
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• 2007

Tetramethylorthosilicate (TMOS) and silica nanopowder were synthesized from the waste silicon sludge containing 15% weight of silicon powder. TMOS, a precursor of silica nanopowder, was firstly prepared from the waste silicon sludge by catalytic chemical reaction. The maximum recovery of the TMOS was 100% after 5 hrs regardless of reaction temperature above $130^{\circ}C$. But the initial reaction rate became faster while the reaction temperature was higher than $150^{\circ}C$. As the methanol feedrate Increased from 0.8 ml/min to 1.4 ml/min, the yield of reaction was not varied after 3 hrs. Then, silica nanopowder was synthesized from the synthesized TMOS by flame spray pyrolysis. The morphology of as-prepared silica nanopowder was spherical and non-aggregated. The average particle diameters ranged from 9 nm to 30 nm and were in proportional to the precursor feed rate, and precursor concentration.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.560-564
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• 2003

Thick oxide layer was fabricated by anodic reaction and complex oxidation performed by combining low temperature thermal oxidation (50$0^{\circ}C$, 1 hr at $H_2O$/O$_2$) and a RTO (rapid thermal oxidation) process (105$0^{\circ}C$, 1 min). Electrical characteristics of OPSL (oxidized porous silicon layer) were almost the same as those of thermal silicon dioxide prepared at high temperature. The leakage current through the OPSL of 20${\mu}{\textrm}{m}$ thickness was about 100 - 500 ㎀ in the range 0 V to 50 V. The average value of breakdown field was about 3.9 MV/cm. From the XPS analysis, surface and internal oxide films of OPSL prepared by complex process were confirmed completely oxidized and also the role of RTO process was important for the densification of PSL (porous silicon layer) oxidized at low temperature.

• Journal of the Korean Vacuum Society
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• v.7 no.4
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• pp.390-396
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• 1998

Neutral stream was generated from Helicon plasma source and was applied to etch silicon for the purpose of preventing physical and electrical damages from the bombardment of charged particles with high translation energy. By installing a permanent magnet and applying positive bias beneath the substrate, the cusp-magnetic and electric fiddles were generated in order to remove the charged particles from the downstream plasma. As a result, the electron density and ion density in the vicinity of the substrate were reduced by 1/1000 and 1/10, respectively. The directional etching of silicon was observed and the etch rate was found to be very low to below 100 $\AA$/min at a pressure of $8.5{\times}10^{-4}$ Torr, when $Cl_2$ and 10% $SF_{sigma}$ etchant gases were used.

• Journal of Sensor Science and Technology
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• v.8 no.5
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• pp.400-406
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• 1999

Piezoresistive flow sensors with four different types of microbeam structures were fabricated using (100), n/$n^+$/n three-layer silicon wafer and their characteristics were investigated. Piezoresistors were formed through boron diffusion and its values were about $1\;k{\Omega}$. Three-dimensional silicon microbeams were constructed by porous silicon micromachining and curled microbeams were fabricated by the difference in the thermal expansion coefficient between silicon and metal. The output response of the fabricated sensor was evaluated through half- bridge. The output voltage increased with increasing length of microbeam at the same flow velocity, while the detectable measurement range extended with decreasing length of microbeam. The output voltage of the fabricated sensors were increased with quotient of 3.2 of the flow rate since the stress of the beam versus the gas flow showed non-linear characteristics.

• Journal of the Korean Vacuum Society
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• v.7 no.2
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• pp.88-93
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• 1998

The fabrication process and emission characteristics of gated silicon field emitter arrays(FEAs) using chemical-mechanical-polishing (CMP) method are described. Novel fabrication techniques consisting of two-step dry etching with oxidation of silicon and CMP processes were developed for the formation of sharp tips and clear-cut edged gate electrodes, respectively. The gate height and aperture could be easily controlled by varying the polishing time and pressure in the CMP process. We obtained silicon FEAs having self-aligned and clear-cut edged gate electrode opening by eliminating the dishing problem during the CMP process with an oxide mask layer. The tip height of the finally fabricated FEAs was about 1.1 $\mu$m and the end radius of the tips was smaller than 100 $\AA$. The emission current meaured from the fabricated 2809 tips array was about 31 $\mu$A at a gate voltage of 80 V.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.4 no.1
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• pp.42-45
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• 1994

Deposition of silicon on pretreated sapphire and glass substrates has been investigated by the solution growth method at low temperatures. An average 14 $\mu\textrm{m}$ thickness of silicon was grown over a large area on sapphire substrate originally coated with a much thinner silicon layer [0.5 $\mu\textrm{m}$ (100) Si/(1102) sapphire)] at low temperatures from $380~460^{\cire}C$. Successful results were obtained from surface treated glass substrates in the temperatures range from $420~520^{\circ}C$.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1612-1614
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• 2002

본 논문에서는 엑시머 레이저 조사에 의한 이온 농도의 분포 변화를 알아보기 위해 붕소 이온이 선택적으로 주입된 비정질 실리콘 박막 위에 XeCl (${\lambda}$=308nm) 엑시머 레이저를 조사하여 붕소이온의 수평 확산 현상을 관찰하였다. 도핑 농도의 분포를 알아보기 위해 불산/질산 용액에 의한 고농도 도핑 영역의 습식 식각을 이용하여 약 $10^{18}/cm^3$ 이하의 붕소이온을 가지는 실리콘 박막의 형태를 전자주사 현미경을 이용해서 관찰하였다. 실험 결과, $200mJ/cm^2$의 레이저 에너지가 조사될 경우, 약 100nm의 수평 확산이 일어났음을 확인 할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.604-604
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• 2012

기존의 실리콘 이종접합 태양전지는 후면에도 passivation layer인 i-a-Si:H 및 BSF층인 n-a-Si:H가 형성되는 구조를 가지고 있었다. 이러한 구조를 대체하기 위하여 본 연구에서는 실리콘 이종접합 태양전지의 후면 구조에 passivation 층 및 BSF층을 novel material인 Sb증착 및 RTP, laser anneal을 통해 새로운 BSF층 형성하고 태양전지 특성에 대해서 분석하였다. 이를 위해서 carrier lifetime, LIV, DIV 및 QE 등 전기적, 광학적 분석뿐만 아니라 SIMS 분석을 통하여 laser annealing 공정으로 형성된 BSF층의 depth profile 분석도 진행하였다. 또한 wafer orientation에 따른 특성을 분석하기 위하여 (100) 및 (111) wafer를 이용하여 분석하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.336-336
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• 2011

AMOLED에 대한 관심이 높아짐에 따라 LTPS (Low Temperature Poly Silicon) TFT에 대한 연구가 활발히 이루어지고 있다. 다결정 실리콘은 단결정 실리콘에 비해 100 cm2/V 이상의 이동도를 보이는 우수한 특성으로 인해 AMOLED 디스플레이에 적합하며 여러 기업에서 LTPS 공정을 이용한 TFT제작을 연구 중이다. LTPS 공정은 현재 ELA (Excimer Laser Annealing) 방식으로 대면적 유리기판에 ELA 방법을 적용함에 있어 설비투자 비용이 지나치게 높아진다는 단점을 가지고 있다. 설비투자 비용의 문제점을 해결하기 위해 Diode Laser을 이용하여 Annealing하는 방법에 대해 연구하였다. 본 연구는 Diode Laser Annealing 방식을 이용하여 poly-Si을 구현하였다. 단결정 실리콘을 제작하기 위해 ICP-CVD장비를 이용하여 150$^{\circ}C$에서 SiH4, He2 혼합, He/SiH4의 flow rate는 20/2[sccm], RF power는 400 W에서 700 W으로 가변, 증착 압력은 25mTorr으로 하였다. 940 nm 파장의 30 W Diode Laser를 8 mm Spot Size로 a-Si에 순간 조사하여 결정화, 그 결과 grain을 형성한 polycrystalline 구조를 확인하였다.