• Title/Summary/Keyword: 스파이킹 뉴럴 네트워크

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Model Optimization for Supporting Spiking Neural Networks on FPGA Hardware (FPGA상에서 스파이킹 뉴럴 네트워크 지원을 위한 모델 최적화)

  • Kim, Seoyeon;Yun, Young-Sun;Hong, Jiman;Kim, Bongjae;Lee, Keon Myung;Jung, Jinman
    • Smart Media Journal
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    • v.11 no.2
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    • pp.70-76
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    • 2022
  • IoT application development using a cloud server causes problems such as data transmission and reception delay, network traffic, and cost for real-time processing support in network connected hardware. To solve this problem, edge cloud-based platforms can use neuromorphic hardware to enable fast data transfer. In this paper, we propose a model optimization method for supporting spiking neural networks on FPGA hardware. We focused on auto-adjusting network model parameters optimized for neuromorphic hardware. The proposed method performs optimization to show higher performance based on user requirements for accuracy. As a result of performance analysis, it satisfies all requirements of accuracy and showed higher performance in terms of expected execution time, unlike the naive method supported by the existing open source framework.

Implementation of Encoder/Decoder to Support SNN Model in an IoT Integrated Development Environment based on Neuromorphic Architecture (뉴로모픽 구조 기반 IoT 통합 개발환경에서 SNN 모델을 지원하기 위한 인코더/디코더 구현)

  • Kim, Hoinam;Yun, Young-Sun
    • Journal of Software Assessment and Valuation
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    • v.17 no.2
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    • pp.47-57
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    • 2021
  • Neuromorphic technology is proposed to complement the shortcomings of existing artificial intelligence technology by mimicking the human brain structure and computational process with hardware. NA-IDE has also been proposed for developing neuromorphic hardware-based IoT applications. To implement an SNN model in NA-IDE, commonly used input data must be transformed for use in the SNN model. In this paper, we implemented a neural coding method encoder component that converts image data into a spike train signal and uses it as an SNN input. The decoder component is implemented to convert the output back to image data when the SNN model generates a spike train signal. If the decoder component uses the same parameters as the encoding process, it can generate static data similar to the original data. It can be used in fields such as image-to-image and speech-to-speech to transform and regenerate input data using the proposed encoder and decoder.

QoS-Aware Optimal SNN Model Parameter Generation Method in Neuromorphic Environment (뉴로모픽 환경에서 QoS를 고려한 최적의 SNN 모델 파라미터 생성 기법)

  • Seoyeon Kim;Bongjae Kim;Jinman Jung
    • Smart Media Journal
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    • v.12 no.4
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    • pp.19-26
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    • 2023
  • IoT edge services utilizing neuromorphic hardware architectures are suitable for autonomous IoT applications as they perform intelligent processing on the device itself. However, spiking neural networks applied to neuromorphic hardware are difficult for IoT developers to comprehend due to their complex structures and various hyper-parameters. In this paper, we propose a method for generating spiking neural network (SNN) models that satisfy user performance requirements while considering the constraints of neuromorphic hardware. Our proposed method utilizes previously trained models from pre-processed data to find optimal SNN model parameters from profiling data. Comparing our method to a naive search method, both methods satisfy user requirements, but our proposed method shows better performance in terms of runtime. Additionally, even if the constraints of new hardware are not clearly known, the proposed method can provide high scalability by utilizing the profiled data of the hardware.

Memristors based on Al2O3/HfOx for Switching Layer Using Single-Walled Carbon Nanotubes (단일 벽 탄소 나노 튜브를 이용한 스위칭 레이어 Al2O3/HfOx 기반의 멤리스터)

  • DongJun, Jang;Min-Woo, Kwon
    • Journal of IKEEE
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    • v.26 no.4
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    • pp.633-638
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    • 2022
  • Rencently, neuromorphic systems of spiking neural networks (SNNs) that imitate the human brain have attracted attention. Neuromorphic technology has the advantage of high speed and low power consumption in cognitive applications and processing. Resistive random-access memory (RRAM) for SNNs are the most efficient structure for parallel calculation and perform the gradual switching operation of spike-timing-dependent plasticity (STDP). RRAM as synaptic device operation has low-power processing and expresses various memory states. However, the integration of RRAM device causes high switching voltage and current, resulting in high power consumption. To reduce the operation voltage of the RRAM, it is important to develop new materials of the switching layer and metal electrode. This study suggested a optimized new structure that is the Metal/Al2O3/HfOx/SWCNTs/N+silicon (MOCS) with single-walled carbon nanotubes (SWCNTs), which have excellent electrical and mechanical properties in order to lower the switching voltage. Therefore, we show an improvement in the gradual switching behavior and low-power I/V curve of SWCNTs-based memristors.