• Journal of KIISE:Software and Applications
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• v.34 no.3
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• pp.196-211
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• 2007

In the Product Line Engineering (PLE), current studies about an analysis of the feature have uncertain and ad-hoc criteria of analysis based on developer’s intuition or domain expert’s heuristic approach and difficulty to extract explicit features from a product in a product line because the stakeholders lack comprehensive understanding of the features in feature modeling. Therefore, this paper proposes a model of the analyzing commonality and variability of the feature based on the Ontology. The proposed model in this paper suggests two approaches in order to solve the problems mentioned above: First, the model explicitly expresses the feature by making an individual feature attribute list based on the meta feature modeling to understand common feature. Second, the model projects an analysis model of commonality and variability using the semantic similarity between features based on the Ontology to the stakeholders. The main contribution of this paper is to improve the reusability of distinguished features on developing products of same line henceforth.

• Journal of KIISE:Software and Applications
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• v.32 no.4
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• pp.237-246
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• 2005

Product Line Engineering(PLE) is one of the technologies that develop applications economically reusing core assets. PLE consists of Framework Engineering(FE) and Application Engineering. Framework Engineering is to develop core assets that have common functionality shared by a set of family members. Application Engineering is to develop a specific application by instantiating the core assets. The PLE process increases reusability and efficiency because a specific application is developed by using core assets with less time and effort. Since definition of PLE artifacts and relationship between artifacts are not clear. developers have several troubles to make artifacts based on PLE process, are difficult to maintain consistency between artifacts, and do not use PLE process more practically. In this paper, we define meta-models of artifacts that are produced in PLE activities of PLE process and describe the traceability relationship between artifacts by using traceability map and guidelines that can apply traceability relationship. Finally, we define the way how trace links and guidelines of traceability map are applied.

• Journal of KIISE:Software and Applications
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• v.32 no.8
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• pp.717-729
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• 2005

Product Line Engineering (PLE) consists of two phases; Core Assets Development and Application Engineering. The core asset development is to model common features of members in a domain and to develop them. The application engineering is to effectively generate an application by instantiating the core asset. Today, PLE research mainly focuses on developing core assets, whereas activities and instructions for application engineering are weakly defined. Moreover, instructions of application engineering are not enough to be practically applied. To widely apply PLE to industry, researches on systematic and practical methods such as instantiation processes, instructions, and artifacts are needed. In this paper, we propose a practical PLE process, instructions, and artifacts about each activity. And then, we also present a case study to show applicability and practicality of the process proposed in this paper.

• The KIPS Transactions:PartD
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• v.13D no.1 s.104
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• pp.51-60
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• 2006

Product Line Engineering(PLE) is an effective software development technique which produces applications using core assets. Because of reusing the core assets, PLE can save cost for developing products in a domain but increase reusability. There are about ten PLE methodologies available, but there are not yet common agreements on PLE process and artifacts. This makes developers harder to choose a methodology and to apply it in practice. A comprehensive technical evaluation and comparison on existing PLE methodologies would be essential for practitioners. In this paper, we present a technical assessment of representative PLE methodologies; FAST, SEI SPL, PuLSE, Bosch's PL proceis, FOPLE, ESAPS, KobrA/PoLITe, Alexandria, COPA, QADA. They are compared in the criteria of process, artifacts, instructions, and special features. And we identify common or variable elements between methodologies and confirm elements to be improved in each PLE methodology. The assessment result would be well utilized in defining a practical methodology for PLE projects and in choosing an appropriate methodology among available ones.

• Proceedings of the Korean Information Science Society Conference
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• 2007.10b
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• pp.50-54
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• 2007

소프트웨어 개발을 위한 모델링 방법 중 대표적인 것으로 UML을 이용한 방법이 있으며, 제품계열공학에서 소프트웨어의 재사용을 위한 모델링 방법으로 feature 모델링에 관한 연구가 진행 되고 있다. feature 모델링 방법은 잘 정의된 개발 기법을 제공하여 활용되고 있으나 다소 범용 적이지 않다. 또한 그 구조물이 UML과 상이하여 UML사용자가 feature 모델을 재사용하는 데는 어려움을 가지고 있고, feature 모델에서 class모델로의 변환을 제시한 기존연구는 도메인 전문가에 의해 경험적으로 모델링을 하기 때문에 모호성과 이해의 오류, 그리고 잘못된 해석 등의 문제가 발생 된다. 그리고, feature 모델과 class모델의 모든 요소를 매핑하여 변환하지 않는다는 점에서 완전하지 못하다. 따라서 본 논문에서는 Ontology를 이용하여 의미 기반의 명확한 명세를 통한 feature모델의 class 모델로의 변환기법을 제시하고, 이를 위해 feature 모델과 class 모델의 구조물의 요소를 정의하고 이를 기반으로 feature 모델과 OWL, 그리고 class 모델 속성간의 매핑 규칙을 제시하고, 본 논문에서 제시한 변환 프로세스를 이용하여 사례연구를 하였다.

• Journal of the Semiconductor & Display Technology
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• v.22 no.1
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• pp.124-128
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• 2023

Semiconductor engineers have long sought to enhance the energy efficiency of mobile semiconductors by reducing their voltage. During the final stages of the semiconductor manufacturing process, the screening and evaluation of voltage is crucial. However, determining the optimal test start voltage presents a significant challenge as it can increase testing time. In the semiconductor manufacturing process, a wealth of test element group information is collected. If this information can be controlled to predict the test voltage, it could lead to a reduction in testing time and increase the probability of identifying the optimal voltage. To achieve this, this paper is exploring machine learning techniques, such as linear regression and ensemble models, that can leverage large amounts of information for voltage prediction. The outcomes of these machine learning methods not only demonstrate high consistency but can also be used for feature engineering to enhance accuracy in future processes.

• Journal of KIISE:Software and Applications
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• v.33 no.2
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• pp.154-166
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• 2006

Product Line Engineering(PLE) is a software reuse paradigm that core assets are defined using common features in a domain and are instantiated in various applications. To apply the core asset effectively, variants which satisfy application requirements are extracted and the core asset should be also instantiated based on the variants. For the work, variability on architecture and components should be extracted exactly and an instantiation process and guidelines should be defined based on this variability In this paper, we define variability types depending on core assets elements and describe artifact templates related to tile variability. We also propose a systematic process which uses defined core assets including variability and verify practicability of the proposed process and variability expression through doing ease study. If utilizing with the proposed process in PLE, it can be feasible to model concrete core asset and variability and to utilize practical application engineering.