• The Journal of the Convergence on Culture Technology
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• v.7 no.1
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• pp.608-614
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• 2021

Currently, blockchain-based public cryptocurrency (hereinafter referred to as cryptocurrency) cannot acquire status as a currency for transaction due to the economic policies of each country, but it is used as an alternative currency transaction method due to individual circumstances of some Internet users. With this trend, it is predicted that such cryptocurrency can be used in real life beyond the Internet in the near future. In this paper, a technical method for designing a cryptocurrency payment system based on LoRaWAN that can easily build a wireless Internet network infrastructure at low cost as a way to activate the use of cryptocurrency in real life is presented based on the LoRaWAN standard.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.18 no.3
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• pp.23-32
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• 2008

The computing power of graphics processing units(GPU) has already surpassed that of CPU and the gap between their powers is getting wider. Thus, research on GPGPU which applies GPU to general purpose becomes popular and shows great success especially in the field of parallel data processing. Since the implementation of cryptographic algorithm using GPU was started by Cook et at. in 2005, improved results using graphic libraries such as OpenGL and DirectX have been published. In this paper, we present skills and results of implementing block ciphers using CUDA library announced by NVIDIA in 2007. Also, we discuss a general method converting source codes of block ciphers on CPU to those on GPU. On NVIDIA 8800GTX GPU, the resulting speeds of block cipher AES, ARIA, and DES are 4.5Gbps, 7.0Gbps, and 2.8Gbps, respectively which are faster than the those on CPU.

• Proceedings of the KAIS Fall Conference
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• 2009.05a
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• pp.624-627
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• 2009

본 논문에서는 차세대 블록 암호 시스템으로 선정되었으며 미연방정부의 표준으로 제정된 RBC(Rijndael Block Cipher) 알고리즘을 하드웨어로 구현하였다. 구현된 블록 암호 시스템은 임베디드 시스템에 적용이 가능하도록 암호화 블록과 복호화 블록을 따로 설계하지 않고 하드웨어를 공유하여 하나의 블록에서 선택에 따라 암호화와 복호화가 모두 이루어질 수 있도록 설계함으로써 하드웨어의 면적을 최소화하였다.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.30 no.3
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• pp.325-336
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• 2020

Nonlinear Invariant Attack is an attack that should be considered when constructing lightweight block ciphers with relatively simple key schedule. A shortcut to prove a block cipher's resistance against nonlinear invariant attack is checking the smallest dimension of linear layer-invariant linear subspace which contains all known differences between round keys is equal to the block size. In this paper, we presents the following results. We identify the structure and number of optimal bit-permutations which require only one known difference between round keys for a designer to show that the corresponding block cipher is resistant against nonlinear invariant attack. Moreover, we show that PRESENT-like block ciphers need at least two known differences between round keys by checking all PRESENT-like bit-permutations. Additionally, we verify that the variants of PRESENT-like bit-permutations requiring the only two known differences between round keys do not conflict with the resistance against differential attack by comparing the best differential trails. Finally, through the distribution of the invariant factors of all bit-permutations that maintain BOGI logic with GIFT S-box, GIFT-variant block ciphers require at least 8 known differences between round keys for the resistance.

• The Journal of the Convergence on Culture Technology
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• v.8 no.1
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• pp.583-590
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• 2022

With the release of the Bitcoin source in 2009, cryptocurrencies are continuously developing and expanding the market. Recently, new applicability is expanding centered on NFT coin and metaverse payment service. In particular, the Central Cryptocurrency Exchange actively supports relay transactions between cryptocurrencies or between traditional fiat currencies and cryptocurrencies. The cryptocurrency trading market based on such a central exchange encouraged speculative factors of cryptocurrencies, strongly arousing speculation and futility of cryptocurrencies. In addition, the central cryptocurrency exchange induces the centralization of users and virtual assets, thereby hindering the decentralization and security enhancement strategies of the block chain. Therefore, this study describes the current status and problems of centrally controlled centralized cryptocurrency exchanges in service, and presents a distributed cryptocurrency exchange modeling strategy and major issues as a decentralization model of the exchange. This research can strengthen the anonymity, decentralization, and autonomy of cryptocurrency based on blockchain.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.7
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• pp.1608-1616
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• 2015

This paper describes an efficient hardware implementation of lightweight encryption algorithm LEA-128/192/256 which supports for three master key lengths of 128/192/256-bit. To achieve area-efficient and low-power implementation of LEA crypto- processor, the key scheduler block is optimized to share hardware resources for encryption/decryption key scheduling of three master key lengths. In addition, a parallel register structure and novel operating scheme for key scheduler is devised to reduce clock cycles required for key scheduling, which results in an increase of encryption/decryption speed by 20~30%. The designed LEA crypto-processor has been verified by FPGA implementation. The estimated performances according to master key lengths of 128/192/256-bit are 181/162/109 Mbps, respectively, at 113 MHz clock frequency.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.32 no.4
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• pp.607-615
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• 2022

The SITM (See-In-The-Middle) proposed in CHES 2020 is a methodology for side-channel assisted differential cryptanalysis. This technique analyzes the power traces of unmasked middle rounds in partial masked SPN block cipher implementation, and performs differential analysis with the side channel information. Blockcipher GIFT is a lightweight blockcipher proposed in CHES 2017, designed to correct the well-known weaknesses of block cipher PRESENT and provide the efficient implementation. In this paper, we propose SITM attacks on partial masked implementation of GIFT-128. This attack targets 4-round and 6-round masked implementation of GIFT-128 and time/data complexity is 2^14.01 /2^14.01, 2¹⁶ /2¹⁶. In this paper, we compare the masterkey recovery logic available in SITM attacks, establishing a criterion for selecting more efficient logic depending on the situation. Finally, We introduce how to apply the this attack to GIFT-COFB, one of the finalist candidates in NIST lightweight cryptography standardization process.

• Review of KIISC
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• v.31 no.6
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• pp.13-18
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• 2021

본 고에서는 최근 급격히 발전하고 있는 양자컴퓨터와 이를 이용한 암호분석의 최신 동향에 대해 확인해 보도록 한다. 특히 양자컴퓨터를 이용한 블록암호에 대한 대표적인 공격 기법인 Grover 알고리즘과 최근에 연구가 진행되고 있는 양자인공지능을 활용한 암호 공격에 확인해 보도록 한다.

• Journal of Korea Multimedia Society
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• v.11 no.8
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• pp.1093-1100
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• 2008

Feistel and SPN are the two main structures in designing a block cipher algorithm. Unlike Feistel, an SPN has an asymmetric structure in encryption and decryption. In this paper we propose an SPN algorithm which has a symmetric structure in encryption and decryption. The whole operations in our SPN algorithm are composed of the even numbers of N rounds where the first half of them, 1 to N/2, applies function and the last half of them, (N+1)/2 to N, employs inverse function. Symmetry layer is executed to create a symmetry block in between function layer and inverse function layer. AES encryption and decryption algorithm, whose safety is already proved, are exploited for function and inverse function, respectively. In order to be secure enough against the byte or word unit-based attacks, 32bit rotation and simple logical operations are performed in symmetry layer. Due to the simplicity of the proposed encryption and decryption algorithm in hardware configuration, the proposed algorithm is believed to construct a safe and efficient cipher in Smart Card and RFID environments where electronic chips are built in.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.04a
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• pp.1474-1477
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• 2009

본 논문에서는 ASR(Arithmetic Shift Register)과 SHA-2로 구성된 32비트 출력의 새로운 스트림 암호 ASC를 제안한다. ASC는 소프트웨어 및 하드웨어 구현이 쉽게 디자인된 스트림 암호 알고리즘이다. 특히 계산능력이 제한된 무선 통신장비에서 빠르게 수행할 수 있도록 개발되었다. ASC는 다양한 길이(8-32바이트)의 키를 지원하고 있으며, 워드 단위로 연산을 수행한다. ASC는 매우 간결한 구조를 가지고 있으며 선형 궤환 순서기(Linear Feedback Sequencer)로 ASR을 적용하였고, 비선형 순서기(Nonlinear sequencer)로 SHA-2를 적용하여 크게 두 부분으로 구성되어 있는 결합 함수(combining function) 스트림 암호이다. 그리고 8비트, 16비트, 32비트 프로세스에서 쉽게 구현이 가능하다. 제안한 스트림 암호 ASC는 최근에 표준 블록 암호로 제정된 AES, ARIA, SEED등의 블록 암호보다는 6-13배 빠른 결과를 보여주고 있으며, 안전성 또한 현대 암호 알고리즘이 필요로 하는 안전성을 만족하고 있다.