• Journal of the Korean Data and Information Science Society
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• v.28 no.6
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• pp.1229-1244
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• 2017

In recent years, as demand for data-based analytical methodologies increases in various fields, optimization methods have been developed to handle them. In particular, various constraints required for problems in statistics and machine learning can be solved by convex optimization. Alternating direction method of multipliers (ADMM) can effectively deal with linear constraints, and it can be effectively used as a parallel optimization algorithm. ADMM is an approximation algorithm that solves complex original problems by dividing and combining the partial problems that are easier to optimize than original problems. It is useful for optimizing non-smooth or composite objective functions. It is widely used in statistical and machine learning because it can systematically construct algorithms based on dual theory and proximal operator. In this paper, we will examine applications of ADMM algorithm in various fields related to statistics, and focus on two major points: (1) splitting strategy of objective function, and (2) role of the proximal operator in explaining the Lagrangian method and its dual problem. In this case, we introduce methodologies that utilize regularization. Simulation results are presented to demonstrate effectiveness of the lasso.

• Journal of Internet Computing and Services
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• v.8 no.3
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• pp.75-83
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• 2007

Multithreaded model is an effective parallel system in that it can reduce the long memory reference latency time and solve the synchronization problems. When compiling the non-strict functional programs for the multithreaded parallel machine, the most important thing is to find an set of sequentially executable instructions and to partitions them into threads. The existing partitioning algorithm partitions the condition of conditional expression, true expression and false expression into the basic blocks and apply local partitioning to these basic blocks. We can do the better partitioning if we modify the definition of the thread and allow the branching within the thread. The branching within the thread do not reduce the parallelism, do not increase the number of synchronization and do not violate the basic rule of the thread partitioning. On the contrary, it can lengthen the thread and reduce the number of synchronization. In the paper, we enhance the method of the partition of threads by combining the three basic blocks into one of two blocks.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.12 no.3
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• pp.267-275
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• 1987

This paper concerns a study on the theory of tearing which analyzes a large scale network by partitioning it into a number of small subnetworks by cutting through some of the existing nodes and branches in the network. By considering of the relationship its voltage and current of node cutting before and after, the consititutive equations of tearing method is equvalent to renumbering the nodes of untorn network equations. Therefore the analysis of network is conveniently applied as same algorithm that is used in untorn network. Also the proposed nodal admittnace matrix is put in block diagonal form, therefore this method permit parallel processing analysis of subnetworks. 30 nodes network was tested and the effectiveness of the proposed algorithm was proved.

• Proceedings of the Korean Information Science Society Conference
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• 1998.10a
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• pp.86-88
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• 1998

본 논문에서는 미래형 고성능 컴퓨터인 클러스터링 시스템에 적합한 스케줄링 알고리즘을 제안한다. 클러스터링 시스템은 분산환경과 병렬환경을 같이 갖는 시스템으로써 스케줄링 전략이 굉장히 중요하고 또한 잘 해결되지 않는 부분이기도 하다. 시간공유(time sharing)스케줄링 전략으로 접근한 내재 스케줄링(implicit Coscheduling)의 단점을 지적하고 이를 보완 하여 우선순위 상속 전략을 이용한 내재 스케줄링 전략을 제안한다.

• 한국가시화정보학회:학술대회논문집
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• 2004.04a
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• pp.57-63
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• 2004

최근 일반 범용 PC 에 장착되고 있는 ATI 나 NVIDIA 등의 그래픽스 가속기의 성능은 수년전과 비교할 때 비교가 안 될 정도의 빠른 속도를 자랑하고 있다. 이러한 속도 향상과 함께 급격하게 일어나고 있는 변화 중의 하나는 바로 기존의 고정된 기능의 그래픽스 파이프라인(fixed-function graphics pipeline)과는 달리 프로그래머가 가속기의 기능을 자유자재로 프로그래밍할 수 있도록 해주는 프로그래밍이 가능한 파이프라인(programmable graphics pipeline)의 출현이라 할 수 있다. 이러한 가속기에 장착되고 있는 GPU (Graphics Processing Unit)는 간단한 형태의 SIMD 프로세서라 할 수 있는데, 특히 GPU 의 한 부분인 픽셀 쉐이더는 그 처리 속도가 매우 높기 때문에 이를 통하여 기존의 수치 알고리즘을 병렬화 하려는 시도가 활발히 일어나고 있다. 본 강연에서는 다양한 수치 계산을 그래픽스 가속기를 사용하여 해결하려는 시도에 대하여 간단히 살펴본다.

• Proceedings of the Korea Information Processing Society Conference
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• 2010.04a
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• pp.502-504
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• 2010

We propose novel transition rule of cellular automata for image enhancement and sharpening algorithm using it. Transition rule present sequential and parallel behavior. it also satisfy Lyapunov function. This image sharpening was developed and experimented by using a dynamic feature of convergence to fixed points. We can obtain efficiently sharpened image by performing arithmetic operation at the gradual parts of difference of brightness without image information.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.10
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• pp.1537-1545
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• 1993

In this paper, we design a pattern generator and a fault position detector to implement the proposed fault test algorithms which are Column Weight Sensitive Fault (CWSF) test algorithm and bit line decoder fault test algorithm for performing the Built-In Self Test(BIST) in RAM. A pattern generator consists of an address generator and a data generator. An address generator is divided into a row address generator for effective address and a column address generator for sequential and parallel addresses. A fault position detector is designed to determine whether full occurred or not and to find the position of the fault. We verify the implemented circuits by the simulation.

• The Journal of the Korea Contents Association
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• v.10 no.7
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• pp.10-22
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• 2010

This study proposes a new method of multiple homographies estimation between two images. With a large proportion of outliers, RANSAC is a general and very successful robust parameter estimator. However it is limited by the assumption that a single model acounts for all of the data inliers. Therefore, it has been suggested to sequentially apply RANSAC to estimate multiple 2D projective transformations. In this case, because outliers stay in the correspondence data set through the estimation process sequentially, it tends to progress slowly for all models. And, it is difficult to parallelize the sequential process due to the estimation order by the number of inliers for each model. We introduce a guided sequential RANSAC algorithm, using the local model instances that have been obtained from RANSAC procedure, which is able to reduce the number of random samples and deal simultaneously with multiple models.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.7
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• pp.53-61
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• 2004

In this paper, we proposed a new architecture of MAC(Multiplier-Accumulator) to operate high-speed multiplication-accumulation. We used the MBA(Modified radix-4 Booth Algorithm) which is based on the 1's complement number system, and CSA(Carry Save Adder) for addition of the partial products. During the addition of the partial product, the signed numbers with the 1's complement type after Booth encoding are converted in the 2's complement signed number in the CSA tree. Since 2-bit CLA(Carry Look-ahead Adder) was used in adding the lower bits of the partial product, the input bit width of the final adder and whole delay of the critical path were reduced. The proposed MAC was applied into the DWT(Discrete Wavelet Transform) filtering operation for JPEG2000, and it showed the possibility for the practical application. Finally we identified the improved performance according to the comparison with the previous architecture in the aspect of hardware resource and delay.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.5
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• pp.723-730
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• 2016

Solar cells in a PV module are connected in series and parallel to produce a higher voltage and current. The PV module has performance characteristics depending on solar radiation and temperature. In addition, the PV system causes power loss by special situations, including the shadows of the surrounding environment, such as nearby buildings and trees. In other words, an increase in power loss and a decrease in life cycle can occur because of the partial shadow and hot-spot effect. Therefore, this paper proposes the optimal configuration algorithm of a bypass diode to improve the output of a PV module and one of a PV array to minimize the loss of the PV array. In addition, this paper presents a model of a PV module and PV array based on the PSIM S/W. The simulation results confirmed that the proposed optimal configuration algorithms are useful tools for improving the performance of PV system.