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Effects of Inter-Vehicle Information Propagation on Chain Collision Accidents (차량간 정보전파의 연쇄추돌 교통사고에 대한 효과)

  • Chang, Hyun-ho;Yoon, Byoung-jo;Jeong, So-Yeon
    • KSCE Journal of Civil and Environmental Engineering Research
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    • v.38 no.2
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    • pp.303-310
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    • 2018
  • One of most shocking headlines is a serious chain collision accident (CCA). The development of CCA has a temporal and spatial locality, and the information of the CCA is time-critical. Due to these characteristics of CCA, traffic accident information should be rapidly propagated to drivers in order to reduce chain collisions, right after the first accident occurs. Inter-vehicle communication (IVC) based on ad-hoc communication is one of promising alternatives for locally urgent information propagation. Despite this potential of IVC, research for the effects of IVC on the reduction of CCA has not been reported so far. Therefore, this study develops the parallel platform of microscopic vehicle and IVC communication simulators and then analyses the effects of IVC on the reduction of the second collision related to a series of vehicles. To demonstrate the potential of the IVC-based propagation of urgent traffic accident information for the reduction of CCA, the reduction of approaching-vehicle speed, the propagation speed of accident information, and then the reduction of CCA were analysed, respectively, according to scenarios of combination of market rates and traffic volumes. The analysis results showed that CCA can be effectively reduced to 40~60% and 80~82% at the penetration rates of 10% and 50%, respectively.

Comparison of Main Circuit Type Characteristics of LED Driver for Output Ripple Reduction (출력 리플 저감을 위한 LED 드라이버의 주회로 방식 특성 비교)

  • Park, Dae-Su;Kim, Tae-Kyung;Oh, Sung-Chul
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.20 no.3
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    • pp.491-499
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    • 2019
  • Recently, there has been increasing demand for power quality in power supply devices. The IEC 61000-3-2 standard requires that the AC / DC power supply for lighting meet the specifications for the power factor (PF) and total waveform distortion (THD). In addition, advanced countries in Europe are regulating the ripple rate as 15 ~ 30% for the flicker phenomenon caused by the change in the amount of foot energy due to the change in current of the output terminal. Therefore, domestic standards and regulations are being updated. This study adopted the Flyback converter to satisfy the PFC standard, and has the circuit first and second insulation function. To reduce the low frequency ripple of the LED current, Flyback, Coupled Inductor, LC parallel resonance filter, LLC resonance filter, and Cuk were simulated by PSIM to mimic each LED driving circuit. A coupled LC resonant circuit with a coupled inductor on the primary side and LC resonance on the secondary side was also proposed for output side ripple reduction.

A Study on the Underwater Channel Model based on a High-Order Finite Difference Method using GPUs (그래픽 프로세서를 이용한 고차 유한 차분식 기반 수중채널모델 연구)

  • Bae, Ho Seuk;Kim, Won-Ki;Son, Su-Uk;Ha, Wansoo
    • Journal of the Korea Society for Simulation
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    • v.30 no.1
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    • pp.11-20
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    • 2021
  • As unmanned underwater systems have recently emerged, a high-speed underwater channel modeling technique, which is one of the most important techniques in the system, has received a lot of attention. In this paper, we proposed a high-speed sound propagation model and verified the applicability through quantitative performance analyses. We used a high-order finite difference method (FDM) for wave propagation modeling in the water, and a domain decomposition method was adopted using multiple general-purpose graphics processing units (GPUs) to increase the calculation efficiency. We compared the results of the model we proposed with the analytic solution in the half-infinite media and results of the Virtual Timeseries Experiment (VirTEX) model, which is based on the ray method. Finally, we analyzed the performance of the model quantitatively using numerical examples. Through quantitative analyses of the improvement in computational performance, we confirmed that the computational speed increases linearly as the number of GPUs increases. The computation times are increased by 2 times and 8 times, respectively, when the domain size of computation and the maximum frequency are doubled. We expect that the proposed high-speed underwater channel modeling technique is able to contribute to the enhancement of national defense as an underwater communication channel model and analysis tool to develop the underwater communication technique for the unmanned underwater system.

A Multithreaded Architecture for the Efficient Execution of Vector Computations (벡타 연산을 효율적으로 수행하기 위한 다중 스레드 구조)

  • Yun, Seong-Dae;Jeong, Gi-Dong
    • The Transactions of the Korea Information Processing Society
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    • v.2 no.6
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    • pp.974-984
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    • 1995
  • This paper presents a design of a high performance MULVEC (MULtithreaded architecture for the VEctor Computations), as a building block of massively parallel Processing systems. The MULVEC comes from the synthesis of the dataflow model and the extant super sclar RISC microprocesso r. The MULVEC reduces, using status fields, the number of synchronizations in the case of repeated vector computations within the same thread segment, and also reduces the amount of the context switching, network traffic, etc. After be nchmark programs are simulated on the SPARC station 20(super scalar RISC microprocessor)the performance (execution time of programs and the utilization of processors) of MULVEC and the performance(execution time of a program) of *Taccording the different numbers of node are analyzed. We observed that the execution time of the program in MULVEC is faster than that in * T about 1-2 times according the number of nodes and the number of the repetitions of the loop.

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Design of Bit Manipulation Accelerator fo Communication DSP (통신용 DSP를 위한 비트 조작 연산 가속기의 설계)

  • Jeong Sug H.;Sunwoo Myung H.
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.42 no.8 s.338
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    • pp.11-16
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    • 2005
  • This paper proposes a bit manipulation accelerator (BMA) having application specific instructions, which efficiently supports scrambling, convolutional encoding, puncturing, and interleaving. Conventional DSPs cannot effectively perform bit manipulation functions since かey have multiply accumulate (MAC) oriented data paths and word-based functions. However, the proposed accelerator can efficiently process bit manipulation functions using parallel shift and Exclusive-OR (XOR) operations and bit jnsertion/extraction operations on multiple data. The proposed BMA has been modeled by VHDL and synthesized using the SEC $0.18\mu m$ standard cell library and the gate count of the BMA is only about 1,700 gates. Performance comparisons show that the number of clock cycles can be reduced about $40\%\sim80\%$ for scrambling, convolutional encoding and interleaving compared with existing DSPs.

A Network-Distributed Design Optimization Approach for Aerodynamic Design of a 3-D Wing (3차원 날개 공력설계를 위한 네트워크 분산 설계최적화)

  • Joh, Chang-Yeol;Lee, Sang-Kyung
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.32 no.10
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    • pp.12-19
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    • 2004
  • An aerodynamic design optimization system for three-dimensional wing was developed as a part of the future MDO framework. The present design optimization system includes four modules such as geometry design, grid generation, flow solver and optimizer. All modules were based on commercial softwares and programmed to have automated execution capability in batch mode utilizing built-in script and journaling. The integration of all modules into the system was accomplished through programming using Visual Basic language. The distributed computational environment based on network communication was established to save computational time especially for time-consuming aerodynamic analyses. The distributed aerodynamic computations were performed in conjunction with the global optimization algorithm of response surface method, instead of using usual parallel computation based on domain decomposition. The application of the design system in the drag minimization problem demonstrated considerably enhanced efficiency of the design process while the final design showed reasonable results of reduced drag.

Multiple Antenna System for Next Generation Mobile Communication (차세대 이동 통신용 다중 안테나 시스템)

  • Han, Min-Seok;Choi, Jae-Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.6
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    • pp.660-669
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    • 2010
  • In this paper, a multiple antenna system for next generation mobile applications is proposed. The proposed MIMO antenna consists of two parallel folded monopole antennas with the length of 100 mm and spacing of 6 mm and a decoupling network which locates at the top side of a mobile handset. In order to improve the isolation characteristic at the LTE band 13, a decoupling network was added between the two antenna elements placed close to each other. The decoupling network, consisting of two transmission lines, a shunt reactive component and common ground line, is simple and compact. To obtain the wide bandwidth characteristic, an wide folded patch structure generating the strong coupling between feeding and shorting lines through the slit is used at the bottom side of a mobile handset. Also, the performance of a multiple antenna system composed of three antenna elements is analyzed.

Static Allocation of C++ Objects to CORBA-based Distributed Systems (C++ 객체의 CORBA 기반 분산 시스템으로의 정적 할당)

  • 최승훈
    • Journal of Internet Computing and Services
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    • v.1 no.2
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    • pp.69-88
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    • 2000
  • One of the most important factors on the performance of the distributed systems is the effective distribution of the software components, There have been a lot of researches on partitioning and allocating the task-based system, while the studies on the allocating the objects of the object-oriented system into the distributed object environments are very little relatively. In this paper. we defines the graph model for partitioning the existing C++ application and allocating the C++ objects into CORBA-base distributed system, In addition, we propose a distributed object allocation algorithm based on this graph model. The performance of distributed systems is determined by the concurrency between objects, the load balance among the processors and the communication cost on the networks. To search for the solutions optimizing the above three factors simultaneously, the object allocation algorithm of this paper is based on the Niched Pareto Genetic Algorithm (NPGA). We performed the experiment on the typical C++ application and CORBA system to prove the effectiveness of our graph model and our object allocation algorithm.

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Dynamic Load Balancing Scheme Based on Resource Reservation for Migration of Agents in Pure P2P Network Environments (순수 P2P 네트워크 환경에서 에이전트 이주를 위한 자원 예약 기반 동적 부하 균형 기법)

  • Kim, Kyung-In;Kim, Young-jin;Eom, Young-Ik
    • The KIPS Transactions:PartA
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    • v.11A no.4
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    • pp.257-266
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    • 2004
  • Mobile agents are defined as processes which can be autonomously delegated or transferred among the hosts in a network in order to perform some computations on behalf of the user and co-operate with other agents. Currently, mobile agents are used in various fields, such as electronic commerce, mobile communication, parallel processing, search of information, recovery, and so on. In pure P2P network environment, if mobile agents that require computing resources rashly migrate to another peers without consideration on the peer's capacity of resources, the peer may have a problem that the performance of the peer is degraded due to lack of resources. To solve this problem, we propose resource reservation based load balancing scheme of using RMA(Resource Management Agent) that monitors workload information of the peers and that decides migrating agents and destination peers. In mobile agent migrating procedure, if the resource of specific peer is already reserved, our resource reservation scheme prevents other mobile agents from allocating the resource.

A Dilation-Improved Embedding of Pyramids into 3-Dimensional Meshes (피라미드의 3-차원 메쉬로의 신장율 개선 임베딩)

  • Chang, Jung-Hwan
    • The KIPS Transactions:PartA
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    • v.10A no.6
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    • pp.627-634
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    • 2003
  • In this paper, we consider a graph-theoretic problem,, the so-called "graph embedding problem" that maps the vertices and edges of the given guest graph model into the corresponding vertices and paths of the host graph under the condition of maintaining better performance parameters such as dilation, congestion, and expansion. We firstly propose a new mapping function which can embed the pyramid model with height N into the 3-dimensional mesh massively parallel processor system with the height $(4^{(N+1)/3}+2)/3$ and the regular 2-dimensional mesh of one side $2^{(2N-1)/3}$, and analyze the performance of the embedding in terms of the dilation parameter that reflects the number of communication steps between two adjacent vertices under the embedding. We prove that the dilation of the embedding is $2{\cdot}4^{(N-2)/3}+4)/3$. This is superior to the previous result of $4^{N+183}+2)/3$ under the same condition.condition.