• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.5
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• pp.782-787
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• 2000

The monolithic single-pole three-throw(SP3T) GaAs PIN diode switch circuit for the broadband and high power application was designed, fabricated and characterized. To improve the power handling capability, buffer layers of the diode employ both low temperature buffer and superlattice buffer. The diode show the breakdown voltage of 65V and turn-on voltage of 1.3V. The monolithic integrated switch employed microstrip lines and backside via holes for low-inductance signal grounding. The vertical epitaxial PIN structure demonstrated better microwave performance than planar type structures due to lower parasitics and higher quality intrinsic region. As the large signal characteristics of the fabricated SP3T MMIC switch, the insertion loss was measured less than 0.6dB and the isolation better than 50dB when the input power was increased from 8dBM to 32dBm at 14.5GHz.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.22 no.3
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• pp.691-705
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• 2012

Buffer overflow vulnerability is the most representative one that an attack method and its countermeasure is frequently developed and changed. This vulnerability is still one of the most critical threat since it was firstly introduced in middle of 1990s. Shellcode is a machine code which can be used in buffer overflow attack. Attackers make the shellcode for their own purposes and insert it into target host's memory space, then manipulate EIP(Extended Instruction Pointer) to intercept control flow of the target host system. Therefore, a lot of research to defend have been studied, and attackers also have done many research to bypass security measures designed for the shellcode defense. In this paper, we investigate shellcode defense and attack techniques briefly and we propose our new methodology which can hide shellcode in the 24bit BMP image. With this proposed technique, we can easily hide any shellcode executable and we can bypass the current detection and prevention techniques.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.5
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• pp.986-991
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• 2016

In this study, we prepared ITO thin films on $Nb_2O_5/SiO_2$ double buffer layer using DC magnetron sputtering method and investigated electrical and optical properties with various substrate temperatures (room temperature ~ $400^{\circ}C$). The resistivity showed a decreasing tendency, because crystallinity has been improved due to the enlarged grain size with increasing substrate temperature. ITO thin film deposited at $400^{\circ}C$ showed the most excellent value of resistivity and sheet resistance as $3.03{\times}10^{-4}{\Omega}{\cdot}cm$, $86.6{\Omega}/sq.$, respectively. In results of optical properties, average transmittance was increased but chromaticity ($b^*$) was decreased in visible light region (400~800nm) with increasing substrate temperature. Average transmittance and chromaticity ($b^*$) of ITO thin film deposited at $400^{\circ}C$ exhibited significantly improved results as 85.8% and 2.13 compared to 82.8% and 4.56 of the ITO thin film without buffer layer. Finally, we found that ITO thin film introduced $Nb_2O_5/SiO_2$ double buffer layer has a remarkably improved optical property such as transmittance and chromaticity due to the index matching effect.

• KIPS Transactions on Computer and Communication Systems
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• v.12 no.9
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• pp.283-290
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• 2023

With the recent steady development of IoT technology, it is widely used in medical systems and smart TV watches. 66% of software development is developed through language C, which is vulnerable to memory attacks, and acts as a threat to IoT devices using language C. A stack-smashing overflow attack inserts a value larger than the user-defined buffer size, overwriting the area where the return address is stored, preventing the program from operating normally. IoT devices with low memory capacity are vulnerable to stack smashing overflow attacks. In addition, if the existing vaccine program is applied as it is, the IoT device will not operate normally. In order to defend against stack smashing overflow attacks on IoT devices, we used canaries among several detection methods to set conditions with random values, checksum, and DSLR (random storage locations), respectively. Two canaries were placed within the buffer, one in front of the return address, which is the end of the buffer, and the other was stored in a random location in-buffer. This makes it difficult for an attacker to guess the location of a canary stored in a fixed location by storing the canary in a random location because it is easy for an attacker to predict its location. After executing the detection program, after a stack smashing overflow attack occurs, if each condition is satisfied, the program is terminated. The set conditions were combined to create a number of eight cases and tested. Through this, it was found that it is more efficient to use a detection method using DSLR than a detection method using multiple conditions for IoT devices.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.15 no.3
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• pp.471-480
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• 2002

In this paper, the thermal stress analysis of spent nuclear fuel disposal canister in a deep repository at 500 m underground is carried out for the basic design of the canister. Since the nuclear fuel disposal usually emits much heat, a long term safe repository at a deep bedrock is used. Under this situation, the canister experiences the thermal load due to the heat generation of spent nuclear fuels in the basket. Hence, in this paper the thermal stress analysis is executed using the finite element method. The finite clement code Eot the analysis Is not written directly, but a commercial code, NISA, is used because of the complexity of the structure and the large number of elements required for the analysis. The analysis result shows that even though the thermal stress is added to the stress generated by the hydrostatic underground water pressure and the swelling pressure of the bentonite buffer, the total stress is still smaller than the yield stress of the cast iron. Hence, the canister is still structurally safe when the thermal loads we included in the external loads applied on the canister.

• Journal of Korea Spatial Information System Society
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• v.11 no.2
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• pp.133-142
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• 2009

Recently, with the advance of wireless internet and the frequent use of mobile devices, demand for LBS(Location Based Service) is increasing, and research is required on spatial indexes for the storage and maintenance of spatial data to provide efficient LBS in mobile device environments. In addition, the use of flash memory as an auxiliary storage device is increasing in order to store large spatial data in a mobile terminal with small storage space. However, the application of existing spatial indexes to flash-memory lowers index performance due to the frequent updates of nodes. To solve this problem, research is being conducted on flash-memory based spatial indexes, but the efficiency of such spatial indexes is lowered by low utilization of buffer and flash-memory space. Accordingly, in order to solve problems in existing flash-memory based spatial indexes, this paper proposed FR-Tree (Flash-Memory based R-Tree) that uses the node compression technique and the delayed write operation technique. The node compression technique of FR-Tree increased the utilization of flash-memory space by compressing MBR(Minimum Bounding Rectangle) of spatial data using relative coordinates and MBR size. And, the delayed write operation technique reduced the number of write operations in flash memory by storing spatial data in the buffer temporarily and reflecting them in flash memory at once instead of reflecting the insert, update and delete of spatial data in flash-memory for each operation. Especially, the utilization of buffer space was enhanced by preventing the redundant storage of the same spatial data in the buffer. Finally, we perform ed various performance evaluations and proved the superiority of FR-Tree to the existing spatial indexes.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.455-458
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• 2004

We present an efficient heuristic algorithm to reduce glitch power dissipation in combinational circuits. In this paper, the total number of glitches are reduced by replacing existing gates with functionally equivalent ones and by gate sizing which classified into three types and by buffer insertion which classified into two types. The proposed algorithm combines gate freezing, gate sizing. and buffer insertion into a single optimization process to maximize the glitch reduction. Our experimental results show an average of $67.8\%$ glitch reduction and $32.0\%$ power reduction by simultaneous gate freezing, gate sizing, and buffer insertion.

• Proceedings of the Acoustical Society of Korea Conference
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• autumn
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• pp.357-358
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• 2004

생체 피부하 약 5mm이내 영역에 대한 고분해능의 B-모드 영상을 얻는 데 사용할 수 있는 축 방향 분해능 $30{\mu}m$ 이하인 VHF 대역 초음파 트랜스듀서로서 용융석영을 음향버퍼의 하여 그 양단에 송신용 2-2 composite와 수신용 P(VDF-TrFE)를 설치한 송수신 분리형의 집속 트랜스듀서의 구조를 새로이 제안하고, 그 전기적 음향적 특성을 시뮬레이션 하였다. 그 결과, 2-2 composite 투께 $18{\mu}m$와 P(VDF-TrFE) 두께 $12{\mu}m$의 트랜스듀서는 중심주파수 43.0MHz, 비대역 $74\%$이며, 삽입손실이 25dB인 비교적 우수한 트랜스듀서가 될 수 있음을 알았다.

• Proceedings of the Korea Information Processing Society Conference
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• 2001.10b
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• pp.1517-1520
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• 2001

과거의 컴퓨터를 이용한 미디어 서비스는 사용자에게 단순히 비디오, 오디오, 텍스트 등의 미디어를 일방적으로 전달하였으나 현재의 서비스는 사용자와의 상호대화 및 필요한 미디어 만을 선택해서 전달할 수 있는 방식을 요구한다. 이러한 응용을 위해서 각 미디어 파일들을 분리하여 전달하는 방식이 필요하며 동기화와 더불어 상호대화성 이라는 두 가지 문제를 해결해야 한다. 지금까지의 관련 연구에서는 시간축, 패트리 넷(Petri Net), 버퍼 조작 등의 방법을 통하여 동기화를 달성하고 있으나 상호대화라는 측면에서는 만족할 만한 해결책을 제시하지 않고 있다. 본 논문에서는 패트리 넷 모델을 이용하고 상호대화형 객체(Interactive Object)를 각 미디어 파일에 삽입하여 이 객체들이 서로의 정보를 이용할 수 있는 함수를 설계함으로서 동기화와 상호대화성이라는 문제를 해결하였다.

• Journal of KIISE:Computer Systems and Theory
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• v.26 no.5
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• pp.555-562
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• 1999

VLSI 시스템 설계 단게에서 시스템의 고성능 및 고신뢰성을 보장하는 것이 중용한 요건이 되고 있다. 본 논문은 회로의 긴 경로들과 짧은 경로들 상에 존재하는 구성요소들간의 시간지연들이 타이밍 제약조건들을 만족하도록 최적화시킴으로서 고성능 및 고신뢰도를 동시에 실현할 수 있는 효율적인 알고리즘을 제안한다. 과거에는 VLSI 시스템의 고성능을 실현하기 위한 긴 경로 최적화와 고신뢰도를 실현하기 위한 짧은 경로 최적화를 각각 독립적으로 수행하는 방법들이 제안되었다. 본 논문은 긴 경로들 및 짧은 경로들 상의 시간지연 요소들을 동시에 최적화함으로써 적절한 수행시간과 적은 메모리 요구량의 오버헤드를 허용하는 범위에서 효과적인 단계들로 수행되는 병합 알고리즘을 제안하고자한다. 그리고 제안된 병합 알고리즘의 효율성을 입증하기 위해 벤치마크 회로들을 이용하여 실험 결과들을 보여줄 것이다.