• Journal of Internet of Things and Convergence
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• v.8 no.4
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• pp.9-15
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• 2022

NAND flash memory is used as a medium for various storage devices due to its high data processing speed with low power consumption. However, since the read processing speed of data is about 10 times faster than the write processing speed, various studies are being conducted to improve the speed difference. In particular, flash dedicated buffer management policies have been studied to improve write speed. However, SSD(solid state disks), which has recently been used for various purposes, is more vulnerable to read performance than write performance. In this paper, we find out why read performance is slower than write performance in SSD composed of NAND flash memory and study buffer management policies to improve it. The buffer management policy proposed in this paper proposes a method of improving the speed of a flash-based storage device by analyzing the pattern of read data and applying a policy of pre-reading data to be requested in the future from NAND flash memory. It also proves the effectiveness of the read-ahead policy through simulation.

• Proceedings of the Korean Information Science Society Conference
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• 2001.10a
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• pp.730-732
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• 2001

최근 들어 버퍼오버플로우 취약성을 이용한 해킹 사례들이 늘어나고 있다. 버퍼오버플로우 공격을 탐지하는 방법은 크게 입력 데이터의 크기검사, 비정상적인 분기 금지, 비정상 행위 금지의 세가지 방식 중 하나를 취한다. 본 논문에서는 비정상적인 분기를 금지하는 방법을 살펴본 것이다. 기존의 방법은 부가적인 메모리를 필요로 하고, 컨트롤 플로우가 비정상적인 흐름을 찾기 위해 코드를 추가하고 실행함으로써 프로그램 실행시간의 저하를 단점으로 이야기할 수 있다. 본 논문에서는 부가적인 메모리 사용을 최소한으로 줄임으로 메모리 낭비를 저하시키고 실행시간에 컨트롤 플로우가 비정상적으로 흐르는 것을 막기 위한 작업들을 최소화 함으로서 기존의 방법보다 더 효율적인 방법을 제안하고자 한다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.38 no.10
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• pp.24-33
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• 2001

Delay, delay variation and packet loss rate are principal QoS(Quality of Service) elements of packet communication. This paper proposes a new buffer allocation mechanism to improve the packet loss performance in such a situation that multiple logical buffers share a single physical memory buffer. In the proposed buffer allocation mechanism, the movement of dynamic threshold follows a curved track instead of a straight line which is used in the DT(dynamic threshold) mechanism. In order evaluate the effectiveness of the proposed mechanism, it is compared with the existing previously proposed mechanisms in several aspects including NC(no control), ST(Static Threshold) and DT mechanisms.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10c
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• pp.128-133
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• 2006

NAND 플래시 메모리는 작고, 가볍고, 저 전력이라는 장점 U문에 휴대폰, MP3, PDA 등 이동 컴퓨팅 장치의 저장소로 많이 사용되고 있다. B+트리는 저장소에 있는 데이터를 효율적으로 접근하기 위한 색인 구조이다. 그러나 NAND 플래시 메모리의 다양한 특징들로 인해 기존의 디스크 기반의 B+트리를 플래시 메모리에 그대로 적용하는데 여러 단점들이 존재한다. 본 논문에서는 NAND 플래시 메모리 상에서 B+트리를 효과적으로 구축하기 위한 B+트리 색인 버퍼 관리 기법을 제안한다.

• Proceedings of the Korean Information Science Society Conference
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• 2007.06c
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• pp.92-97
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• 2007

차세대 저장매체로 떠오르고 있는 플래시 메모리는 가벼운 무게, 작은 부피 그리고 온도 및및 충격에 강한 내구성, 적은 전력소모, 빠른 자료 접근성 등의 특징을 가지고 있어 MP3 플레이어, 디지털 카메라, PDA, 핸드폰등과 같은 휴대용 전자기기에 저장장치로 사용되고 있다. 하지만 플래시 메모리가 가지는 하드웨어적 특성 때문에 디스크 기반의 저장장치와는 다른 접근 기법이 필요하다. 특히 B+트리가 구축될 때 레코드의 삽입, 삭제연산 및 노드 분할 연산은 많은 중첩쓰기 연산을 발생하기 때문에 플래시 메모리의 성능을 심각하게 저하시킨다. 본 논문에서는 B+트리의 연산이 수행되는 과정에서 플래시 메모리로 예약버퍼의 색인단위를 반출해야 할 때, 이를 효과적으로 처리 할 수 있는 방법을 제안한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2012.04a
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• pp.151-154
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• 2012

최근 차세대 저장장치로서 비휘발생 플래시 메모리 기반 저장장치의 사용이 층가하고 있다. 본 논문에서는 플래시 메모리 기반 저장장치의 특생인 삭제 연산의 문제점을 고려하는 새로운 버퍼 캐시 교체 기법을 연구하였다. 제안한 클린 블록 우선 (Clean Block First) 기법은 버퍼를 플래시 메모리의 삭제 블록의 리스트로 관리하고 클린 페이지를 가진 블록을 우선적으로 교체하여 플래시 메모리의 삭제 연산 횟수를 줄인다. 트레이스 기반의 시뮬레이션을 수행하여 교체를 위해 검색하는 클린 블록 개수의 변화에 대한 캐시 적중률과 삭제 연산 횟수를 분석하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2008.11a
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• pp.989-991
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• 2008

최근 플래시 메모리 기반의 저장장치가 하드디스크 영역에서 광범위하게 사용되고 있다. 하지만 단점을 가지고 있는데 느린 쓰기 및 지우기 속도가 그것이다. 본 논문에서는 플래시 메모리의 쓰기 및 지우기 동작을 줄일 수 있는 플래시 메모리 기반의 저장장치를 위한 새로운 버퍼 관리 기법을 제안한다. 제안된 ABM 기법은 플래시 메모리 기반의 저장장치에서 약 30%의 성능향상을 보이고 있다.

• Journal of KIISE:Computer Systems and Theory
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• v.28 no.9
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• pp.442-460
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• 2001

In video-on-demand(VOD) systems it is important to minimize initial latency and memory requirements. The minimization of initial latency enables the system to provide services with short response time, and the minimization of memory requirements enables the system to service more concurrent user requests with the same amount of memory. In VOD systems, since initial latency and memory requirement increase according to the increment of buffer size allocated to user requests, the buffer size allocated to user requests must be minimized. The existing static buffer allocation scheme, however, determines the buffer size based on the assumption that thy system is in fully loaded state. Thus, when the system is in partially loaded state, the scheme allocates user requests unnecessarily large buffers. This paper proposes a dynamics buffer allocation scheme that allocates user requests the minimum buffer size in fully loaded state as well as a partially loaded state. This scheme dynamically determines the buffer size based on the number of user requests in service and the number of user requests arriving while servicing current requests. In addition, through analyses and simulations, this paper validates that the dynamics buffer allocation outperforms the statics buffer allocation in initial latency and the number of concurrent user requests that can be supported. Our simulation results show that, in proportion to the static buffer allocation scheme, the dynamic buffer allocation scheme reduces the average initial latency by 29%~65%, and in a systems having several disks. increases the average number of concurrent user requests by 48%~68%. Our results show that the dynamic buffer allocation scheme significantly improves the performance and reduce the capacity requirements of VOD systems.

• Journal of Korea Spatial Information System Society
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• v.11 no.2
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• pp.133-142
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• 2009

Recently, with the advance of wireless internet and the frequent use of mobile devices, demand for LBS(Location Based Service) is increasing, and research is required on spatial indexes for the storage and maintenance of spatial data to provide efficient LBS in mobile device environments. In addition, the use of flash memory as an auxiliary storage device is increasing in order to store large spatial data in a mobile terminal with small storage space. However, the application of existing spatial indexes to flash-memory lowers index performance due to the frequent updates of nodes. To solve this problem, research is being conducted on flash-memory based spatial indexes, but the efficiency of such spatial indexes is lowered by low utilization of buffer and flash-memory space. Accordingly, in order to solve problems in existing flash-memory based spatial indexes, this paper proposed FR-Tree (Flash-Memory based R-Tree) that uses the node compression technique and the delayed write operation technique. The node compression technique of FR-Tree increased the utilization of flash-memory space by compressing MBR(Minimum Bounding Rectangle) of spatial data using relative coordinates and MBR size. And, the delayed write operation technique reduced the number of write operations in flash memory by storing spatial data in the buffer temporarily and reflecting them in flash memory at once instead of reflecting the insert, update and delete of spatial data in flash-memory for each operation. Especially, the utilization of buffer space was enhanced by preventing the redundant storage of the same spatial data in the buffer. Finally, we perform ed various performance evaluations and proved the superiority of FR-Tree to the existing spatial indexes.

• Journal of KIISE
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• v.42 no.11
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• pp.1314-1321
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• 2015

Mobile devices employ buffer cache mechanisms, just as in computer systems such as desktops or servers, to mitigate the performance gap between main memory and secondary storage. However, DRAM has a problem in that it accelerates battery consumption by performing refresh operations periodically to maintain the stored data. In this paper, we propose a novel buffer cache scheme to increase the battery lifecycle in mobile devices based on a hybrid main memory architecture consisting of DRAM and non-volatile PCM. We also suggest a new buffer cache policy that allocates buffers based on process states to optimize the performance and endurance of PCM. In particular, our algorithm allocates each page to the appropriate position corresponding to the state of the application that owns the page, and tries to ensure a rapid response of foreground applications even with a small amount of DRAM memory. The experimental results indicate that the proposed scheme reduces the elapsed time of foreground applications by 58% on average and power consumption by 23% on average without negatively impacting the performance of background applications.