• Title/Summary/Keyword: 멀티미디어 프로세서

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A System Level Design Space Exploration Tool for a Configurable SoC (재구성 가능 SoC를 위한 시스템 수준 설계공간탐색 도구)

  • 안성용;심재홍;이정아
    • Proceedings of the Korean Information Science Society Conference
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    • 2003.04a
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    • pp.100-102
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    • 2003
  • 멀티미디어 데이터 처리나 암호화 알고리즘과 같은 계산양이 많고 빠른 시간 안에 처리되어야하는 어플리케이션들을 처리하기 위하여 재구성 가능한 논리소자와 내장형 마이크로 프로세서등이 하나의 칩에 통합된 재구성 가능한 SoC가 폭넓게 활용되고 있다. 이러한 컴퓨팅 환경의 시장적응성을 높이기위해서는 프로토타입을 제작하기 전에 설계변수에 따른 성능수치를 이미 예측하여 최소의 비용으로 시스템의 수행 시간 및 자원제약사향을 만족할 수 있는 구조를 찾아내는 것이 필수적이다. 본 논문에서는 Y-chart 설계 방법의 기본 개념을 재구성 가능한 SoC에 적용가능하도록 확장하여, 시스템 수준의 설계공간 탐색 도구를 개발하였다. 구현된 설계 공간 탐색을 통한 시뮬레이션 결과는 시스템 설계자들에게 실제 포로토타입을 구축하지 않고 최적의 설계변수를 결정할 수 있게 하여 설계시간과 설계비용을 현저하게 줄여줄 것으로 기대된다.

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Design of a Serial Port Interface Suitable for Bluetooth Embedded Systems (블루투스 임베디드 시스템에 적용 가능한 직렬 포트 인터페이스 설계)

  • Moon, Sangook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.05a
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    • pp.903-906
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    • 2009
  • In this contribution, we designed a serial port interface (SPI) suitable for embedded systems, especially for Bluetooth baseband. Proposed architecture is compatible for the APB bus in AMBA bus architecture. The 8-bit design of the SPI module is in charge of transferring the data and the instructions between the external devices and the coprocessors. We adopted the cyclic redundancy check method for the error correction. Also, we provided the interface for multimedia cards. The designed SPI module was automatically synthesized, placed, and routed. Implementation was performed through the Altera FPGA and well operated at 25MHz clock frequency.

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Design for MOST network device on AVR32 processor (AVR32 프로세서를 이용한 MOST 네트워크 장치 설계)

  • Park, Duck-Keun;Jeong, Sung-Hwan;Lee, Sang-Yub;Choi, Hyo-Sub;Lee, Chul-Dong
    • Annual Conference of KIPS
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    • 2012.11a
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    • pp.27-28
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    • 2012
  • 오늘날 차량 기술에 대한 관심사는 기계적 성능에서 각종 전자장치를 사용한 기술로 이동하고 있다. 특히 자동차 내에서 각종 멀티미디어 서비스 및 여러 정보들의 통합 분석을 위해서 자동차 네트워크 기술이 각광받고 있다. 본 논문에서는 자동차 네트워크 기술 중 MOST(Media Oriented System Transport)네트워크를 사용하기 위한 장치로 저가형 장치인 MiniAMG 단말기를 제안한다. Mini AMG 단말기를 통해 어떻게 오디오 스트리밍 서비스를 제공하는지와 향후 어떠한 방향으로 사용 가능한지에 대해 기술하였다.

A Design on Rasterizer for the verification in a 3D Graphic Processor (3D 그래픽 프로세서 검증을 위한 래스터라이저 설계)

  • Lee, Mi-Kyoung;Jang, Young Jo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2009.10a
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    • pp.639-642
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    • 2009
  • When the graphics accelerator for high-quality multimedia content design, hardware verification environment, easy and accurate performance evaluation in an embedded device is required. To work around this is not verified through the simulation waveform analysis to determine the actual calculated graphic images has designed a software rasterizer. Rasterizer is designed for Windows-based environment using the C language implementation of rasterization has a function at each step. Vertex data is entered and the results were verified.

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Task Scheduling Algorithm for Parallel Processing in Wireless Sensor Network (무선 센서 네트워크에서 병렬 처리를 위한 태스크 스케쥴링)

  • Park, Chong-Myung;Jung, In-Bum
    • Annual Conference of KIPS
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    • 2009.04a
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    • pp.859-861
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    • 2009
  • 무선 통신, 제한된 자원 (전력, 프로세서, 메모리 등), 신뢰성, 동적인 토폴로지 등의 특성을 갖는 센서 네트워크는 기존의 실시간 시스템과는 많은 차이가 있다. 이러한 센서 네트워크에서 멀티미디어 데이터 처리와 같은 많은 계산을 필요로 하는 어플리케이션이나 실시간 어플리케이션을 개발하기 위해서는 센서 노드들의 데이터 병렬 처리가 필요하다. 비선점형 스케쥴러를 갖는 센서 노드에서 데이터 전송량이 많을 경우 통신을 위한 태스크 생성이 증가하므로 일반 태스크의 실행에도 지연이 발생하게 된다. 자원 제한적인 센서 네트워크에서 에너지 소모나 지연과 같은 성능은 각 센서 노드들에 태스크를 할당하는 방법에 영향을 받는다. 본 연구에서는 병렬 처리에 참여하는 센서 노드들의 에너지 소모량과 지연을 고려한 노드 스케쥴링 기법을 제안한다.

Design and Implementation of an Authentication System for Anti-Forgery using the Smart Card (스마트카드를 이용한 위조방지 인증 시스템 설계 및 구현)

  • Kim, Eun;Lee, Yun-Seok;Jung, Min-Soo
    • Journal of Korea Multimedia Society
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    • v.14 no.2
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    • pp.249-257
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    • 2011
  • To protect the market for various products, existing authentication techniques using ID, hologram and RFID have been gradually developed. However, these methods can be easily exposed the authentication information, and also these exposed information easily copy. Thus, production of the counterfeit goods can not completely prevent. In this paper, to solve these problems, we designed JCVM file system for saving and managing the authentication information, user's information and a sales agency information into the smart card. And we designed and implemented an authentication protocol that can authenticate to avoiding exposure using processor of the smart card. Through this, this proposed scheme can prevent occurrences of the counterfeit goods. And also, can be used for authentication as any product that can attach the smart card.

Design and Implementation of Algorithms for the Motion Detection of Vehicles using Hierarchical Motion Estimation and Parallel Processing (계층화 모션 추정법과 병렬처리를 이용한 차량 움직임 측정 알고리즘 개발 및 구현)

  • 강경훈;정성태;이상설;남궁문
    • Journal of Korea Multimedia Society
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    • v.6 no.7
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    • pp.1189-1199
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    • 2003
  • This paper presents a new method for the motion detection of vehicles using hierarchical motion estimation and parallel processing. It captures the road image by using a CMOS sensor. It divides the captured image into small blocks and detects the motion of each block by using a block-matching method which is based on a hierarchical motion estimation and parallel processing for the real-time processing. The parallelism is achieved by using tile pipeline and the data flow technique. The proposed method has been implemented by using an embedded system. The proposed block matching algorithm has been implemented on PLDs(Programmable Logic Device) and clustering algorithm has been implemented by ARM processor. Experimental results show that the proposed system detects the motion of vehicles in real-time.

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Design and Implementation of Intermediate Code Translator for Native Code Generation from Bytecode (바이트코드로부터 네이티브 코드 생성을 위한 중간 코드 변환기의 설계 및 구현)

  • 고광만
    • Journal of Korea Multimedia Society
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    • v.5 no.3
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    • pp.342-350
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    • 2002
  • The execution speed is not an important factor for Java programming language when implementing small size application program which is executed on the web browser, but it becomes a serious limitation when the huge-size programs are implemented. To overcome this problem, the various research is conducted for translating the Bytecode into the target code which can be implemented in the specific processor by using classical compiling methods. In this research, we have designed and realized an intermediate code translator for the native code generation system with which we can directly generate i386 code from Bytecode to improve the execution speed of Java application programs. The intermediate code translator generates the register-based intermediate code from *.class files which are the intermediate code of Java.

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Temporal Data Migration Strategies by Time Granularity and LST-GET (시간단위와 LST-GET에 의한 시간지원 데이터의 이동 기법)

  • 윤홍원;김경석
    • Journal of Korea Multimedia Society
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    • v.2 no.1
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    • pp.9-21
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    • 1999
  • This paper presents the time-segmented storage structure in order to increment search performance and the two data migration strategies: migration by Time Granularity and migration by LST-GET. In the migration strategy by Time Granularity, we describe how to assign entity version to the past, current segment, and future segments. We also describe searching and moving processes for data validity at a granularity level. In the migration strategy by LST-GET, we describe how to computer the value of dividing criterion. We simulate the search performance of the proposed segmented storage structure in comparison with the conventional storage structure in comparison with the conventional storage structure in relational database system. Finally, extensive simulation studies are performed in order to compare the search performance of the migration strategies with the time-segmented storage structure.

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Pattern Matching Optimizer for Virtual Machine Codes (가상 기계 코드를 위한 패턴 매칭 최적화기)

  • Yi Chang-Hwan;Oh Se-Man
    • Journal of Korea Multimedia Society
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    • v.9 no.9
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    • pp.1247-1256
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    • 2006
  • VM(Virtual Machine) can be considered as a software processor which interprets the abstract machine code. Also, it is considered as a conceptional computer that consists of logical system configuration. But, the execution speed of VM system is much slower than that of a real processor system. So, it is very important to optimize the code for virtual machine to enhance the execution time. In this paper, we designed and implemented the optimizer for the virtual(or abstract) machine code(VMC) which is actually SIL(Standard Intermediate Language) that is an intermediate code of EVM(Embedded Virtual Machine). The optimizer uses the pattern matching optimization techniques reflecting the characteristics of the VMC as well as adopting the existing optimization methodology. Also, we tried a benchmark test for the VMC optimizer and obtained reasonable results.

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