• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.05a
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• pp.185-187
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• 2012

In this paper, the MR fluid damper to the application of the paramagnetic (paramagnetic) particles dispersed in the MR fluid inside the magnet current caused by the MR damper using the principles of the internal fluid delivery yield stress variation is characterized in Silky. In other words, the current strength of the MR fluid damper according to the internal friction coefficient varies phenomenon is to use. The MR fluid damper to control the MCU that you want to use Microchip's dsPIC chips, and current control in order to improve performance by using the PWM and UART communication to an external monitor to monitor the entire system was designed. In this study using MR fluid dampers and dsPIC chip dehydration process happens when a washing machine vibration and noise, vibration and noise reduction sikidorok washing machine protection systems are proposed.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.11
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• pp.19-27
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• 1998

To achieve the required services in the next-generation cellular telephone systems, the size of the cell become smaller and/or is of mixed macrocells and microcells. For more efficient system control, We make use of the mobile position and velocity information, provided that the mobility information is relatively accurate. In this paper, we propose an improved version of path-loss measurement algorithm introduced in literature[11]. The microcellular structure with severe multipath fading, reflection and refraction make mobile position and velocity estimation very difficult. In the proposed method, the pre-recorded path-loss informations, called the discrete position data base, are searched to estimate the position. Velocity estimation is obtained as a difference of the position values with respect to the time difference. Moving average filter is applied to smooth the estimated velocity and to reduce the error in the estimates. We also propose a method to simplify system implementation by reducing search area for discrete area database.

• Journal of IKEEE
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• v.6 no.1 s.10
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• pp.47-53
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• 2002

This paper manufacturing one system and use this separatively, plan, and embody system that apply integration design method in research about characteristic of internal core of 8051 micro-processors and system reusability so that can use as module of other system. The proposed system itself by object style so that reusability may be possible in proposed method and object style for connection between this systems is required. Set on these request and when systems have own information and were linked with other systems, by supplying own information automatic movement itself is realized and system itself embodies ashes so that can be applied to other system. The proposed method in this paper analyzes and compares with existent Z-80 education board, as well as system that propose offers extensibility, it handles most function to software and development period, expense and baud dimension confirmed advantage of and so on that reduce. Also, design for object style system architecture and showed feature that extensibility and portability are augmented.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.860-865
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• 2009

This thesis deals with application of Windows CE for Embedded System and the development methode of "Speed Gate Controller Tester" taking advantage of development program. We can improve reliability, stability and convenience of maintenance work as use of "Speed Gate Controller Tester" which was developed and applied "Embedded System" We can provide customers with more qualified service naturally because of the higher rate of operation which makes people use more pleasant and comfortable subway facility. And also it is possible to manage processor, time schedule and hardware resource as application of Embedded System and Windows CE. Embedded System applied OS Windows CE makes it possible to develop other various products, another application of equipment and tester. Thus this paper treats problems the moment developed and the present condition, development process, field application results.

• Journal of Internet Computing and Services
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• v.10 no.6
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• pp.7-17
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• 2009

The development of wireless communication MAC layer is usually released as SoC which is a combination in hardware and software. In this system development environment, an environment for software development and verification is necessary because the hardware development takes a lot of time priori to completion. In integrated development of hardware and software, simulation environment of hardware and software provided by hardware modeling using HDL at RTL and ISS respectively. By increasing the development complexity of system, ESL design modeling systems at higher abstraction level than RTL has already prompted. The ESL design is divided untime model and time model. This paper present design and implementation of MCU for untime model simulation, not time model. Proposed MCU can optimize the system at early step of system development and move up the development completion time by verifying the system function easily and rapidly than part required exact time in untime model. In this paper, we present an MCU module based on SystemC and UC/OS-II Module providing real-time operate system.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.10
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• pp.962-974
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• 2010

Recently, the convergence of information technology with bio-technology, nano-technology or other technologies has been creating a new paradigm. In a field of transportation, the intelligent transport systems which is a convergence of intelligent technologies and transportation systems have been studied. The Variable Speed Limit(VSL), is one of ITS technologies, is thought to improve safety and efficiency of transportation while controlling speed limit based on road conditions. Legacy studies have considered only one station for VSL algorithm. However, it is not appropriate for an urban freeway installed with many stations. In this paper, new algorithm is proposed to not only enhance effectiveness of VSL based on cooperation of stations but also reflect road conditions within 30 seconds. The proposed algorithm consists of 4 steps: the first is a "searching bottleneck station" step, the second is a "calculating a size of congestion" step, the third is a "calculating the number of controlled stations" step, the final is a "calculating VSL" step. This algorithm guarantees improved safety and minimum additional travel time. The travel time should be considered because drivers would against the VSL algorithm when the proposed algorithm occurs additional travel time. In our experiments, microscopic traffic simulator VISSIM is selected to perform a modeling work. The results show that proposed algorithm provides the improved safety and minimum increase of travel time.