• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.12
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• pp.2589-2594
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• 2012

In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8 GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8 GHz, 7.6 dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. We designed the voltage controlled oscillator using proposed the DGS resonator with varactor diodes placed between gaps of DGS. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

• Journal of Navigation and Port Research
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• v.30 no.10 s.116
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• pp.847-853
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• 2006

In this paper, we designed VCO(voltage controlled oscillator} that is composed of a dielectric resonator and a varactor diode, and the PLDRO(phase locked dielectric resonator oscillator) that is combined with the sampling phase detector and loop filter. The results at 12.05 GHz show the output power is 13.54 dBm frequency tuning range approximately +/- 7.5 MHz, and power variation over the tuning range less than 0.2 dB, respectively. The phase noise which effects on bits error rate in digital communication is obtained with -114.5 dBc/Hz at 100 kHz offset from carrier, and The second harmonic suppression is less than -41.49 dBc. These measured results are found to be more improved than those of VCO without adopting PLL, and the phase noise and power variation performance characteristics show the better performances than those of conventional PLL.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.8
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• pp.1581-1586
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• 2012

In this paper, a novel resonator using ring type DGS is proposed for improvement of phase noise characteristics that is weak point of oscillator using planar type microstrip line resonator, and oscillator for 5.8GHz band is designed using proposed DGS resonator. The ring type DGS resonator is composed of DGS cell etched on ground plane under $50{\Omega}$ microstrip line. At the fundamental frequency of 5.8GHz, 7.6dBm output power and -82.7 dBc@100kHz phase noise have been measured for oscillator with ring type DGS resonator. The phase noise characteristics of oscillator is improved about 9.5dB compared to one using the general ${\lambda}/4$ microstrip resonator. Because it is possible that varactor diode or lumped capacitor is placed on the gaps of ring type DGS, resonant frequency can be controlled by bias voltage. We can design voltage controlled oscillator using proposed ring type DGS resonator. Thus, due to its simple fabrication process and planar type, it is expected that the technique in this paper can be widely used for low phase noise oscillators for both MIC and MMIC applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.3 s.118
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• pp.315-322
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• 2007

In this paper, active integrated antenna with left hand circular polarization(LHCP) for a transmitter of UHF RFID reader has been described. A novel rectangular ring patch as a radiator of the active antenna is proposed for easier impedance matching, smaller patch size, and LHCP characteristics. An amplification circuit is placed in the opening area of the radiator and is combined with it to work as oscillating circuit around 915 MHz. From the test results, impedance bandwidth of 29 MHz, 3 dB axial ratio bandwidth of 20 MHz, 3 dB beamwidth of 85 degree, and effective radiation power of 8.8 dBm have been obtained.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.2 s.117
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• pp.177-182
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• 2007

This paper presents the InGaP/GaAs HBT differential LC VCO with low phase noise performance for adaptive feedback interference cancellation system(AF-lCS). The VCO is verified with enhanced tank structure including filtering technique. The output tuning range for proposed VCO using asymmetric inductor and symmetric capacitors withlow pass filtering technique is 207 MHz. The output powers are -6.68 including balun and cable loss. The phase noise of this VCO at 10 kHz, 100 kHz and 1 MHz are -102.02 dBc/Hz, -112.04 dBc/Hz and -130.40 dBc/Hz. The VCO is designed within total size of $0.9{\times}0.9mm^2$.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1988.10a
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• pp.66-68
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• 1988

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.62-66
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• 2010

In this article, a oscillator at X-band with a double H-shape metamaterial resonator (DHMR) based on high-Q is proposed with metamaterial structure to improve Ihe phase noise and output power. The proposed oscillator is required low phase noise and high output power for the high performance frequency synthesizer. DHMR is designed to be high-Q at resonance frequency through strong coupling of E-field. This character makes phase noise excellent. The oscillator using DHMR is oscillated in X-band so as to apply frequency synthesizer of radar systems. The output power is 4.33 dBm and the phase noise is -108 dBc/Hz at 100 kHz offset of carrier frequency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.12
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• pp.1108-1111
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• 2015

In this paper, a ${\times}49$ frequency multiplier based on a ring oscillator and a multi-push multiplier is presented. The proposed ${\times}49$ frequency multiplier consists of two ${\times}7$ frequency multipliers and these multiplier is connected by injection-locking technique. Each ${\times}7$ frequency multiplier consists of a ring oscillator with 14-phase output signal and 7-push frequency multiplier requiring 14-phase input. The proposed ${\times}49$ frequency multiplier provides 2.78~2.83 GHz output signal with 56.7~57.7 MHz input signal. This operation frequency is defined that the output power difference between the carrier and the spur is above 10 dB. The proposed chip consumes 13.93 mW.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.5-8
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• 1998

기존의 바이폴라 논리회로에서 신호변환시 베이스 영역의 소수 캐리어를 빨리 제거 하기 위해서, 베이스 부분의 매몰충을 줄여서 npn트랜지스터의 베이스와 에피충과 기판사이에 병합 pnp 트랜지스터를 생성한 트랜지스터와 게이트 당 전달 지연 시간을 측정하기 위한 링-발진기를 설계, 제작하였다. 게이트의 구조는 수직 npn 트랜지스터와 기판과 병합 pnp 트랜지스터이다. 소자 시뮬레이션의 자료를 얻기 위하여 수직 npn 트랜지스터와 병합 pnp 트랜지스터의 전류-전압 특성을 분석하여 특성 파라미터를 추출하였다. 결과로서 npn 트랜지스터의 에미터의 면적이 기존의 접합넓이에 비해서 상당히 적기 때문에 에미터에서 진성베이스로 유입되는 캐리어와 가장자리 부분으로 유입되는 캐리어가 상대적으로 많기 때문에 이 많은 양은 결국 베이스의 전류가 많이 형성되며, 또 콜렉터의 매몰층이 거의 반으로 줄었기 때문에 콜렉터 전류가 적게 형성되어 이득이 낮아진다. 병합 pnp 트랜지스터는 베이스폭이 크고 농도 분포에서 에미터의 농도와 베이스의 농도 차이가 적기 때문에 전류 이득이 낮아졌다. 게이트를 연결하여 링-발진기를 제작하여 측정한 AC특성의 출력은 정현파로 논리전압의 진폭은 200mV, 최소 전달 지연시간은 211nS이며, 게이트당 최소 전달지연 시간은 7.26nS의 개선된 속도 특성을 얻었다.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1998.11a
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• pp.151-154
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• 1998

기존의 바이폴라 논리회로에서 신호변환시 베이스 영역의 소수 캐리어를 빨리 제거하기 위해서, 베이스 부분의 매몰층을 줄여서 npn트랜지스터의 베이스와 에피층과 기판사이에 병합 pnp 트랜지스터를 생성한 트랜지스터와 게이트 당 전달 지연 시간을 측정하기 위한 링-발진기를 설계, 제작하였다. 게이트의 구조는 수직 npn 트랜지스터와 기판과 병합 pnp 트랜지스터이다. 결과로서 npn 트랜지스터의 에미터의 면적이 기존의 접합넓이에 비해서 상당히 적기 때문에 에미터에서 진성베이스로 유입되는 캐리어와 가장자리 부분으로 유입되는 캐리어가 상대적으로 많기 때문에 이 많은 양은 결국 베이스의 전류가 많이 헝성되며, 또 콜렉터의 매몰층이 거의 반으로 줄었기 때문에 콜렉터 전류가 적게 형성되어 이득이 낮아진다. 병합 pnp 트랜지스터는 베이스폭이 크고 농도 분포에서 에미터의 농도와 베이스의 농도 차이가 적기 때문에 전류 이득이 낮아졌다. 게이트를 연결하여 링-발진기를 제작하여 측정한 AC특성의 출력은 정현파로 논리전압의 진폭은 200mV, 최소 전달 지연시간은 211nS이며, 게이트당 최소 전달지연 시간은 7.26nS의 개선된 속도 특성을 얻었다.