• Title/Summary/Keyword: 리플전압

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Optimization of Soldering Process of Sn-3.0Ag-0.5Cu and Sn-1.0Ag-0.7Cu-1.6Bi-0.2In Alloys for Solar Combiner Junction Box Module (태양광 접속함 정션박스 모듈 적용을 위한 Sn-3.0Ag-0.5Cu 및 Sn-1.0Ag-0.7Cu-1.6Bi-0.2In 솔더링의 공정최적화)

  • Lee, Byung-Suk;Oh, Chul-Min;Kwak, Hyun;Kim, Tae-Woo;Yun, Heui-Bog;Yoon, Jeong-Won
    • Journal of the Microelectronics and Packaging Society
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    • v.25 no.3
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    • pp.13-19
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    • 2018
  • The soldering property of Pb-containing solder(Sn-Pb) and Pb-free solders(Sn-3.0Ag-0.5Cu and Sn-1.0Ag-0.7Cu-1.6Bi-0.2In) for solar combiner box module was compared. The solar combiner box module was composed of voltage and current detecting modules, diode modules, and other modules. In this study, solder paste printability, printing shape inspection, solder joint property, X-ray inspection, and shear force measurements were conducted. For optimization of Pb-free soldering process, step 1 and 2 were divided. In the step 1 process, the printability of Pb-containing and Pb-free solder alloys were estimated by using printing inspector. Then, the relationship between void percentages and shear force has been estimated. Overall, the property of Pb-containing solder was better than two Pb-free solders. In the step 2 process, the property of reflow soldering for the Pb-free solders was evaluated with different reflow peak temperatures. As the peak temperature of the reflow process gradually increased, the void percentage decreased by 2 to 4%, but the shear force did not significantly depend on the reflow peak temperature by a deviation of about 0.5 kgf. Among different surface finishes on PCB, ENIG surface finish was better than OSP and Pb-free solder surface finishes in terms of shear force. In the thermal shock reliability test of the solar combiner box module with a Pb-free solder and OSP surface finish, the change rate of electrical property of the module was almost unchanged within a 0.3% range and the module had a relatively good electrical property after 500 thermal shock cycles.

Design of a wind turbine generator with low cogging torque by using evolution strategy (진화론적 알고리즘을 이용한 코깅토크가 적은 풍력발전기의 설계)

  • Park, Ju-Gyeong;Cha, Guee-Soo;Lee, Hee-Joon;Kim, Yong-Sub
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.11
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    • pp.755-760
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    • 2016
  • The demand for independent generators using renewable energy has been increasing. Among those independent generators, small wind turbine generators have been actively developed. Permanent magnets are generally used for small wind turbine generators to realize a simple structure and small volume. On the other hand, cogging torque is included due to the structure of the permanent magnet synchronous machine, which can be the source of noise and vibration. The cogging torque can be varied by the shape of the permanent magnet and core, and it can be reduced using the appropriate design techniques. This paper proposes a design technique that can reduce the cogging torque by changing the shape of the permanent magnets for SPMSM (Surface Permanent Magnet Synchronous Motor), which is used widely for small wind turbine generators. Evolution Strategy, which is one of non-deterministic optimization techniques, was adopted to find the optimal shape of the permanent magnets that can reduce the cogging torque. The angle and outer diameter of permanent magnet were set as the design variable. A 300W class wind turbine generator, whose pole/slot combination was 8 poles/18 slots, was designed with the proposed design technique. The properties of the generator, including the cogging torque and output voltage, were calculated. The calculation results showed that the cogging torque of the optimized model was reduced compared to that of the initial model. The design technique proposed by this paper can be an effective measure to reduce the cogging torque.

A New Structural Carry-out Circuit in Full Adder (새로운 구조의 전가산기 캐리 출력 생성회로)

  • Kim, Young-Woon;Seo, Hae-Jun;Han, Se-Hwan;Cho, Tae-Won
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.1-9
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    • 2009
  • A full adders is an important component in applications of digital signal processors and microprocessors. Thus it is imperative to improve the power dissipation and operating speed for designing a full adder. We propose a new adder with modified version of conventional static CMOS and pass transistor logic. The carry-out generation circuit of the proposed full adder is different from the conventional XOR-XNOR structure. The output Cout of module III is generated from input A, B and Cin directly without passing through module I as in conventional structure. Thus output Cout is faster by reducing operation step. The proposed module III uses the static CMOS logic style, which results full-swing operation and good driving capability. The proposed 1bit full adder has the advantages over the conventional static CMOS, CPL, TGA, TFA, HPSC, 14T, and TSAC logic. The delay time is improved by 4.3% comparing to the best value known. PDP(power delay product) is improved by 9.8% comparing to the best value. Simulation has been carried out using a $0.18{\mu}m$ CMOS design rule for simulation purposes. The physical design has been verified using HSPICE.

A New Mode Changable Asymmetric Full Bridge DC/DC Converter having 0 ~ 100 % Duty Ratio (0 ~ 100 % 시비율을 갖는 새로운 모드 가변형 비대칭 풀 브리지 DC/DC 컨버터)

  • Shin, Yong-Saeng;Roh, Chung-Wook;Hong, Sung-Soo;Han, Sang-Kyoo
    • The Transactions of the Korean Institute of Power Electronics
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    • v.15 no.2
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    • pp.103-110
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    • 2010
  • In this paper, a new mode changeable asymmetric full bridge dc/dc converter is proposed to solve the freewheeling current problem of the conventional zero voltage switching(ZVS) phase shift full bridge(PSFB) dc/dc converter of low output voltage and high output current applications. The proposed converter is operated as an asymmetric full bridge converter when the duty cycle is less than 50% and active clamp full bridge converter when the duty cycle is greater than 50%. As a result, since its freewheeling current is eliminated, the conduction loss is lower than that of the conventional ZVS PSFB dc/dc converter. Moreover, ZVS of all power switches can be ensured along a wide load ranges and output current ripple is very small. Therefore, high efficiency of the proposed converter can be achieved. Especially since its operation mode is changed to the active clamp full bridge converter during hold up time and can be operated with 50~100% duty ratio, it can produce the stable output voltage along wide input voltage range. The operational principles, theoretical analysis and design considerations are presented. To confirm the operation, validity and features of the proposed converter, experimental results from a 1.2kW($400V_{dc}/12V_{dc}$) prototype are presented.