• Title/Summary/Keyword: 동적 문턱치화

Search Result 1, Processing Time 0.014 seconds

An FPGA Implementation of Parallel Hardware Architecture for the Real-time Window-based Image Processing (실시간 윈도우 기반 영상 처리를 위한 병렬 하드웨어 구조의 FPGA 구현)

  • Jin S.H.;Cho J.U.;Kwon K.H.;Jeon J.W.
    • The KIPS Transactions:PartB
    • /
    • v.13B no.3 s.106
    • /
    • pp.223-230
    • /
    • 2006
  • A window-based image processing is an elementary part of image processing area. Because window-based image processing is computationally intensive and data intensive, it is hard to perform ail of the operations of a window-based image processing in real-time by using a software program on general-purpose computers. This paper proposes a parallel hardware architecture that can perform a window-based image processing in real-time using FPGA(Field Programmable Gate Array). A dynamic threshold circuit and a local histogram equalization circuit of the proposed architecture are designed using VHDL(VHSIC Hardware Description Language) and implemented with an FPGA. The performances of both implementations are measured.