• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.7 no.5
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• pp.180-183
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• 2008

This research addresses the problem of estimating Origin-Destination (O-D) trip matrices from link volume counts, a set of unobserved link volumes and information of user equilibrium flows in transportation networks. A heuristic algorithm for estimating unobserved link flows is derived, which provides volume estimates that are approximately consistent with both observed flows and an assumption of user equilibrium conditions. These estimated link volumes improve the constraints associated with the synthetic OD estimation model, providing improved solution search procedure. Model performance is tracked in terms of the root mean square errors (RMSE) in predicted travel demands, and where appropriate, predicted linked volumes. These results indicate that the new model substantially outperforms existing approaches to estimating user-equilibrium based synthetic O-D matrices.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.11a
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• pp.281-282
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• 2009

본 논문은 자료구조 알고리즘의 데이터 연산 흐름 과정을 3차원 애니메이션으로 가시화함으로서 학습자의 이해력을 실시간적으로 향상시켜줄 수 있는 3차원 시뮬레이터 시스템 개발에 관한 것이다. 알고리즘은 그 자체가 가지고 있는 난이도 때문에 의사 코드나 실제 코드로서는 이해하기가 어려울 뿐만 아니라 알고리즘의 특성을 파악하기 쉽지 않다는 문제점이 있다. 그러므로 본 논문은 이러한 문제점들을 개선하고 학습자들에게 이해력을 효율적으로 제공하기 위하여 3차원 가상공간에서 데이터 연산 과정을 애니메이션 기법을 사용하여 실시간으로 가시화할 수 있도록 하였다. 본 논문은 교육자와 학습자 모두에게 효율적인 멀티미디어식 교육 환경을 제공하여 자료구조 알고리즘에 대한 이해와 관심을 높이고 나아가서는 논리적이고 분석적인 사고방식을 키우는데 활용할 수 있을 것으로 기대된다.

• Journal of Korea Society of Industrial Information Systems
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• v.11 no.4
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• pp.72-81
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• 2006

In this paper, we first define a total of 64 instructions that are considered to be essential and frequently used, construct a datapath diagram, determine the control sequence using a finite state machine, and implement an 8-bit microcontroller using FPGA in VHDL. In the past, only functional simulation results of a rudimentary microcontroller were reported, the microcontroller lacked interrupt handling capability, or it was not implemented in hardware. We have designed a self-contained 8-bit microcontroller such that it can perform data transfer, addition, and logical operations, as well as stack and external interrupt operations. Following timing simulation of the designed microcontroller, we implemented it in an FPGA and verified its operation successfully. The design and implementation has been done under the Altera MAX+PLUS II integrated development environment using the EP1K50TC144-3 chip. The maximum operating frequency, the total number of logic elements used, and the logic utilization were found to be 9.39 MHz, 2813, and 97%, respectively. The result can be used as a microcontroller IP, and as needs arise, the VHDL code can be modified accordingly.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.35D no.10
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• pp.107-115
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• 1998

A multiplier bit-pair recoding technique derived from Booth algorithm is used as an effective method that can carry out a fast binary multiplication regardless of a sign of both multiplicand and multiplier. In this paper, we propose an implementation of an optical high-speed multiplier which consists of a symbolic substitution adder and an optical multiplication algorithm, which transforms and enhances the multiplier bit-pair recoding algorithm to be fit for optical characteristics. Specially, a symbolic substitution addition rules are coded with a dual-rail logic, and so the complement of the logic of the symbolic substitution adder is easily obtained with a shift operation because it is always present. We also construct the symbolic substitution system which makes superposition image by superimposing two shifted images in a serial connection and recognizes a reference image by feeding this superimposed image to a mask. Thus, the optical multiplier, which is compared with a typical system, is implemented to the smaller system by reducing the number of optical passive elements and the size of this system.

• Journal of the Korea Society of Computer and Information
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• v.19 no.12
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• pp.369-384
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• 2014

Since the start of gifted education in 2002, educational support system has now been established, and sufficient growth in quantitative aspects has been achieved in Korea. On the other hand, they report that there are insufficient points in terms of education quality. In other words, most of the gifted education simply expands knowledge by prior-learning. In order to improve the quality of gifted education, they should enhance critical-thinking and creativity able to apply interdisciplinary principles or phenomena for solving problems. In this study, we designed and developed a convergent teaching-learning materials based on the concept of integrated education, which explore the process that basic logic operations such as AND, OR, XOR do the role of computer cells. A survey result showed that student satisfaction(usefulness, understanding, interest) of the materials is significantly higher than that of other traditional learning topics, and the design intent was met.

• Journal of The Korean Association of Information Education
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• v.22 no.6
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• pp.661-669
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• 2018

As SW education has become essential since 2018 due to the revised curriculum in 2015, researches on SW education are actively being carried out. In order to understand the level of pre-service teachers' computational thinking level, we analyzed a correlation of CT element scores with each year and each grade based on the calculated Scratch project by years using the analysis tool Dr. Scratch, which was targeted for 325 students in K National University of Education who passed the scratch course from 2016 to 2018. The result indicated that there is a positive correlation between all the CT related factors and both the year and the grade. Conclusionally, it is crucial to have students undergo revising process by using an automated evaluation tool such as Dr. Scratch and cultivate ability to create and utilize required materials. Furthermore, it is necessary to educate students to utilize logical thinking elements such as complex conditions and logic operations.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.26 no.7
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• pp.1091-1097
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• 2022

In this paper, we implement the eXclusive OR-based Cast (XC) system that is a video streaming system using exclusive OR operations, and measure various performance metrics in wireless local area network (WLAN) environments. In addition, we investigate the performance improvement of the XC system considering various practical video streaming environments, while conventional studies analyzed the performance of XC through computer simulations in limited environments. To this end, we propose new control messages such as STR_REQ_MSG (SRM) that clients transmit to a video streaming server and STR_CON_MSG (SCM) that is used for the video streaming server to control the clients, and develop a new protocol by using the new control messages. According to the various measurement results using the implemented XC system, XC video streaming system can reduce the consumption of network bandwidth by 8.6% on average and up to 25% compared to the conventional video streaming system. In addition, the outage probability can be also reduced up to 76%.

• Journal of Cadastre & Land InformatiX
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• v.49 no.1
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• pp.157-179
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• 2019

The Seoul's 2030 Youth-Housing has been regarded as the only option to procure rental housing sites in downtown Seoul. But its supply did not catch up with the initial expectation, and the criticism that it may disrupt the current zoning system of the city has persisted. Consequently, the 2030 Youth-Housing policy has undergone amendments for six times within the last three years, and the significant changes in its guideline also have been made within the last one year. The study, in this context, tries to figure out the tendencies of those changes made in the guidelines so far by analyzing the aspects of the parcels allowable for Youth-Housing as well as the areas allowable for up-zoning. In the process, the propositional logic is to be adopted to draw the scope of the buildable areas for Youth-Housing. For this, the study refines the raw GIS data, inputs the values for each proposition, and proceeds the logical operation to judge every parcel of the city to discern whether it is eligible for a buildable site and/or for up-zoning for Youth-Housing. It is seen that: 1) the buildable sites rather evenly distribute around the peripheral subway-station areas while more concentrating on the quasi-residential and commercial areas; and 2) the areas eligible for up-zoning have the tendency to concentrate more on quasi-residential areas than others.

• Journal of the Korean Institute of Intelligent Systems
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• v.8 no.6
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• pp.37-47
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• 1998

This paper proposes a controller design method using the evolutionary computation algorithm and the fuzzy logic to control the wafer temperature in rapid thermal processing. First, we design the feedforward static controller to provide the control powers of the lamps for the given steady state temperature. Second, the feedforward dynamic controller is designed for the additional control powers to achieve a given transient response. These feedforward controllers are implemented by using the fuzzy logic to act as a global nonlinear controller over a wide range of operating points. The parameters of these controllers are optimized by using the evolutionary computation algorithm so that it can be used when the mathematical model is not available. In addition, the feedback error controller is introduced to compensate the feedforward controllers when there exist disturbances and modeling errors. The gain of feedback error controller is also obtained by the evolutionary computation algorithm. Through simulations, we verify the proposed control system can give a satisfactory performance.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.1
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• pp.144-152
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• 1996

In this paper, a pulse-mode digital multilayer neural network with a massively parallel yet compact and flexible network architecture is presented. Algebraicneural operations are replaced by stochastic processes using pseudo-random pulse sequences and simple logic gates are used as basic computing elements. The distributions of the results from the stochastic processes are approximated using the hypergeometric distribution. A statistical model of the noise(error) is developed to estimate the relative accuracy associated with stochastic computing in terms of mean and variance. Numerical character recognition problems are applied to the network to evaluate the network performance and to justify the validity of analytic results based on the developed statistical model. The network architectures are modeled in VHDL using the mixed descriptions of gate-level and register transfer level (RTL). Experiments show that the statistical model successfully predicts the accuracy of the operations performed in the network and that the character classification rate of the network is competitive to that of ordinary Back-Propagation networks.