• The Journal of the Korea Contents Association
• /
• v.20 no.10
• /
• pp.615-629
• /
• 2020

Conducting Focus Group Interview (FGI), this study examined the roles and discourses of cryptocurrency's online communities and media (legacy media and YouTube), and based on this, the study proposed the direction of cryptocurrency policy. By reviewing previous literature, this study analyzed the characteristics of investors, the online community, and YouTube, which is an investment environment factor. The study figured out the purpose of use and role of the community via interviews with cryptocurrency professional investors and online community members and analyzed main discussion themes of the five top-ranked YouTube channels related to cryptocurrency with the highest number of subscribers. The results suggested that cryptocurrency's investment was led by those who are in their 20s and 30s, the investors preferred and trusted information on new media than legacy media. The online community played the role of emotional homogeneity and empathy, and YouTube mainly performed the informational role. As a result of discourse analysis and interviews, this study argued that the legal stability of cryptocurrency's policy and protection of individual investors are needed. This study's significance indicates that it used various research methods such as literature research, interviews, content analysis of community/YouTube to analyze the informational role and emotional aspects of new media and suggested policy direction of the digital new deal blockchain technology and the fairness of financial industry.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.21 no.12
• /
• pp.2213-2220
• /
• 2017

This paper proposes an efficient approach for hardware implementation of moving object detection (MOD) processor using effective Gaussian mixture learning (EGML)-based background subtraction method. Arithmetic units used in background generation were implemented using LUT-based approximation to reduce hardware complexity. Hardware resources used for both background subtraction and Gaussian probability density calculation were shared. The MOD processor was verified by FPGA-in-the-loop simulation using MATLAB/Simulink. The MOD performance was evaluated by using six types of video defined in IEEE CDW-2014 dataset, which resulted the average of recall value of 0.7700, the average of precision value of 0.7170, and the average of F-measure value of 0.7293. The MOD processor was implemented with 882 slices and block RAM of $146{\times}36kbits$ on Virtex5 FPGA, resulting in 60% hardware reduction compared to conventional design based on EGML. It was estimated that the MOD processor could operate with 75 MHz clock, resulting in real-time processing of $800{\times}600$ video with a frame rate of 39 fps.

• KSCE Journal of Civil and Environmental Engineering Research
• /
• v.31 no.1D
• /
• pp.91-98
• /
• 2011

Recently, the usage of elastic paving using EPDM Chip instead of pedestrian sidewalk blocks or permeable concrete used mostly for pedestrian walk, trails and in parks has been increassed as it can absorb impact during walking and produce wide range of colors and designs. However, the properties of EPDM Chip including elasticity and durability are decreased when exposed to ultraviolet ray and scenic paving functions through various colors are lowered due to the yellowing phenomenon. In this study, ultraviolet ray accelerated weathering test has been conducted to analyze the color changes in EPDM Chip and polyurethane resin, which are the main ingredients of elastic paving, when exposed to ultraviolet ray. The color differences are quantitatively analyzed through the color value coordination of the colored space by using the color difference scheme. The experimental results show that the color changes in BL polyurethane resin which is used most frequently at present was larger than that of EPDM Chip. Moreover, the total color difference, ${\Delta}E$, of BC polyurethane resin are 3.162 on the $14^{th}$ day of commencement of acceleration, which is 6 times greater color change resistance against ultraviolet ray than that of BL polyurethane resin with total color difference of 20.639. Therefore, the usage of BC polyurethane resin, which is manufactured to have chain-type molecular structure by using the isocyanate as the HMDI at the time of producing polymer, as binder in elastic paving with EPDM Chip is found to be a highly efficient method of restraining the color changes due to the ultraviolet ray.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.38 no.2
• /
• pp.31-37
• /
• 2001

Digital servo implementation in optical servo chip has been spotlighted since it is easy to integrate with other blocks and it has less sensitive characteristics change in terms of temperature variation and better flexibility to the system variation like pick-up. Therefore, Optical disc players adopted digital servo are increasing in market. However, one drawback of digital signal processor embedded digital servo is power consumption that is one of the most important factors of portable optical disc player system. For that reason, this paper introduces new architecture to reduce power consumption of digital servo by means of reducing DSP load but increasing minimum hardware size. The main idea of reducing power consumption of digital servo greatly is utilizing CDP characteristics as most operations are done and used up most operating steps of DSP at the initial time, but most power consumption is occurred in play mode. Therefore, if operating steps for digital filtering in play mode could be reduced greatly, power consumption of overall system can be reduced greatly. This paper shows an example that low power digital servo architecture whose current is reduced almost 83%, compare to that of digital servo which is not applied by the low power architecture introduced in this paper.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.5
• /
• pp.111-120
• /
• 2016

Wire recognition is one of the important tasks in chip reverse engineering since connectivity comes from wires. Recognized wires are used to recover logical or functional representation of the corresponding circuit. Though manual recognition provides accurate results, it becomes impossible, as the number of wires is more than hundreds of thousands. Wires on a chip usually have specific intensity or color characteristics since they are made of specific materials. This paper proposes two stage wire recognition scheme; image binarization and then the process of determining whether regions in binary image are wires or not. We employ existing techniques for two processes. Since the second process requires the characteristics of wires, the users needs to select the typical wire region in the given image. The histogram characteristic of the selected region is used in calculating histogram similarity between the typical wire region and the other regions. The first experiment is to select the most appropriate binarization scheme for the second process. The second experiment on the second process compares three proposed methods employing histogram similarity of grayscale or HSV color since there have not been proposed any wire recognition method comparable by experiment. The best method shows more than 98% of true positive rate for 25 test examples.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.21 no.4
• /
• pp.443-451
• /
• 2010

This paper describes a fully integrated CMOS low-IF mobile-TV RF tuner for Band-III T-DMB/DAB applications. All functional blocks such as low noise amplifier, mixers, variable gain amplifiers, channel filter, phase locked loop, voltage controlled oscillator and PLL loop filter are integrated. The gain of LNA can be controlled from -10 dB to +15 dB with 4-step resolutions. This provides a high signal-to-noise ratio and high linearity performance at a certain power level of RF input because LNA has a small gain variance. For further improving the linearity and noise performance we have proposed the RF VGA exploiting Schmoock's technique and the mixer with current bleeding, which injects directly the charges to the transconductance stage. The chip is fabricated in a 0.18 um mixed signal CMOS process. The measured gain range of the receiver is -25~+88 dB, the overall noise figure(NF) is 4.02~5.13 dB over the whole T-DMB band of 174~240 MHz, and the measured IIP3 is +2.3 dBm at low gain mode. The tuner rejects the image signal over maximum 63.4 dB. The power consumption is 54 mW at 1.8 V supply voltage. The chip area is $3.0{\times}2.5mm^2$.

• Journal of Broadcast Engineering
• /
• v.18 no.6
• /
• pp.835-849
• /
• 2013

Joint Collaborative Team on Video Coding (JCT-VC), which have founded ISO/IEC MPEG and ITU-T VCEG, has standardized High Efficiency Video Coding (HEVC). Standardization of HEVC has started with purpose of twice or more coding performance compared to H.264/AVC. However, flexible and hierarchical coding block and recursive coding structure are problems to overcome of HEVC standard. Many fast encoding algorithms for reducing computational complexity of HEVC encoder have been proposed. However, it is hard to implement a real-time HEVC encoder only with those fast encoding algorithms. In this paper, for implementation of software-based real-time HEVC encoder, data-level parallelism using SIMD instructions and CPU/GPU multi-threading methods are proposed. And we also proposed appropriate operations and functional modules to apply the proposed methods on HM 10.0 software. Evaluation of the proposed methods implemented on HM 10.0 software showed 20-30fps for $832{\times}480$ sequences and 5-10fps for $1920{\times}1080$ sequences, respectively.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.37 no.12
• /
• pp.60-69
• /
• 2000

This paper describes a single-chip full-custom implementation of pipelined adaptive decision-feedback equalizer(PADFE) using a 0.25-${\mu}m$ CMOS technology for wide-band wireless digital communication systems. To enhance the throughput rate of ADFE, two pipeline stages are inserted into the critical path of the ADFE by using delayed least-mean-square(DLMS) algorithm. Redundant binary (RB) arithmetic is applied to all the data processing of the PADFE including filter taps and coefficient update blocks. When compared with conventional methods based on two's complement arithmetic, the proposed approach reduces arithmetic complexity, as well as results in a very simple complex-valued filter structure, thus suitable for VLSI implementation. The design parameters including pipeline stage, filter tap, coefficient and internal bit-width, and equalization performance such as bit error rate (BER) and convergence speed are analyzed by algorithm-level simulation using COSSAP. The single-chip PADFE contains about 205,000 transistors on an area of about $1.96\times1.35-mm^2$. Simulation results show that it can safely operate with 200-MHz clock frequency at 2.5-V supply, and its estimated power dissipation is about 890-mW. Test results show that the fabricated chip works functionally well.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.49 no.7
• /
• pp.56-64
• /
• 2012

A smart grid is the next generation power grid which combines the existing power grid with information technology, so an energy efficient power grid can be provided. In this paper, in order to build an efficient smart grid an AMI system, which gears with the existing home network and provides an user friendly management function, is proposed. The proposed AMI system, which is based on an extended home network, consists of various functional units; smart meters, communication modules, home gateway, security modules, meter data management modules (MDMM), electric power application modules and so on. The proposed home network system, which can reduce electric power consumption and transmit data more effectively, is designed by using IEEE 802.15.4. The extended home gateway can exchange energy consumption information with the outside management system via web services. The proposed AMI system is designed to enable two-way communication between the home gateway and MDMM via the Internet. The AES(Advanced Encryption Standard) algorithm, which is a symmetric block cipher algorithm, is used to ensure secure information exchange. Even though the results in this study could be limited to our experimental environment, the result of the simulation test shows that the proposed system reduces electric power consumption by 4~42% on average compared to the case of using no control.

• Journal of the Institute of Electronics Engineers of Korea SC
• /
• v.44 no.3
• /
• pp.64-69
• /
• 2007

Motion control of the system is a position control of motor. Motion control of an uncertain robot system is considered as one of the most important and fundamental research directions in the robotics. Some distinguished works using linear control, adaptive control, robust control strategies based on computed torque methodology have been reported. However, it is generally recognized within the control community that these strategies suffer from the following problems : the exact robot dynamics are needed and hard to implement, the adaptive control cannot guarantee the performance during the transient period for adaptation under the variation, the robust control algorithms such as the sliding mode control need information on the bounds of the possible uncertainty and disturbance. And it produces a large control input as well. In this dissertation, a motion control for the unmanned intelligent robot system using disturbance observer is studied. This system is affected with an impact vibration disturbance. This paper describes a stable motion control of the system with the consideration of external disturbance. To obtain the stable motion independently against the external disturbance, the disturbance rejection is strongly required. To address the above issue, this paper presents a Disturbance OBserver(DOB) control algorithm. The validity of the suggested DOB robust control scheme is confirmed by several computer simulation results. And the experiments with a motor system is performed to give the validity of applicability in the industrial field. This results make the easier implementation of the controller possible in the field.