• Annual Conference on Human and Language Technology
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• 2009.10a
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• pp.6-13
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• 2009

본 연구에서는 인간언어공학에서의 활용을 위해 세종전자사전의 의미부류와 KorLexNoun 1.5의 상위노드 간의 사상을 목표로 전문가의 수작업에 의한 세밀한 사상 방법론(fine-grained mapping method)을 제안한다. 또한 이질적인 두 이종 자원 간의 사상에 있어 각 의미체계의 이질성으로 인해 발생하는 여러 가지 문제점을 살펴보고, 그 해결방안을 제안한다. 본 연구는 세종의미부류체계가 밝히고자 했던 한국어의 의미구조와, Prinston WordNet을 참조로 하여 KorLexNoun에 여전히 영향을 미치고 있는 영어 의미구조를 비교함으로써 공통점과 차이점을 파악할 수 있고, 이를 바탕으로 언어 독립적인 개념체계를 구축하는 데 기여할 수 있다. 또한 향후 KorLex의 용언에 기술되어 있는 문형정보와 세종 전자사전의 용언의 격틀 정보를 통합 구축하여 구문분석에서 이용할 때, 세종 의미부류와 KorLexNoun의 상위노드를 통합 구축함으로써 논항의 일반화된 선택제약규칙의 기술에서 이용될 수 있다. 본 연구에서 제안된 사상방법론은 향후 이종 자원의 자동 사상 연구에서도 크게 기여할 것이다. 아울러 두 이종 자원의 사상을 통해 두 의미체계가 지닌 장점을 극대화하고, 동시에 단점을 상호 보완하여 보다 완전한 언어자원으로써 구문분석이나 의미분석에서 이용될 수 있다.

• Journal of the Korean Institute of Intelligent Systems
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• v.13 no.3
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• pp.342-347
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• 2003

It is essential to develop an algorithm for the estimate of link travel velocity and for the supply and control of travel information in the context of intelligent transportation information system. The paper proposes the fuzzy logic based prediction of link travel velocity. Three factors such as time, date and velocity are considered as major components to represent the travel situation. In the fuzzy modeling, those factors were expressed by fuzzy membership functions. We acquire position／velocity data through GPS antenna with PDA embedded probe vehicles. The link travel velocity is calculated using refined GPS data and the prediction results are compared with actual data for its accuracy.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.4
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• pp.81-87
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• 1989

A cellular array multiplier for performing the multiplication of two elements in the finite field GF($2^m$) is presented in this paper. This multiplier is consisted of three operation part ; the multiplicative operation part, the modular operation part, and the primitive irreducible polynomial operation part. The multiplicative operation part and the modular operation part are composed by the basic cellular arrays designed AND gate and XOR gate. The primitive iirreducible operation part is constructed by XOR gates, D flip-flop circuits and a inverter. The multiplier presented here, is simple and regular for the wire routing and possesses the properties of concurrency and modularity. Also, it is expansible for the multiplication of two elements in the finite field increasing the degree m and suitable for VLSI implementation.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.40 no.1
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• pp.10-18
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• 2003

In this paper, we proposed a learning algorithm for the ADALINE network. The proposed algorithm exploits fuzzy system for automatic tuning of the weight parameters of the ADALINE network. The inputs of the fuzzy system are error and change of error, and the output is the weight variation. We used different scaling factor for each weights. In order to verify the effectiveness of the proposed algorithm, we peformed the simulation and experimentation for the cases of the noise cancellation and the inverted pendulum control. The results show that the proposed algorithm does not need the learning rate and improves 4he performance compared to the Widrow-Hoff delta rule for ADALINE.

• Annual Conference on Human and Language Technology
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• 2002.10e
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• pp.129-136
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• 2002

고성능의 질의응답 시스템을 구현하기 위해서는 사용자의 질의 유형의 난이도에 관계없이 의도를 파악할 수 있는 질의유형 분류기가 필요하다. 본 논문에서는 문서 범주화 기법을 이용한 질의 유형 분류기를 제안한다. 본 논문에서 제안하는 질의 유형 분류기의 분류 과정은 다음과 같다. 우선, 사용자 질의에 포함된 어휘, 품사, 의미표지와 같은 다양한 정보를 이용하여 사용자 질의로부터 자질들을 추출한다. 이 과정에서 질의의 구문 특성을 반영하기 위해서 슬라이딩 윈도 기법을 이용한다. 또한, 다량의 자질들 중에서 유용한 것들만을 선택하기 위해서 카이 제곱 통계량을 이용한다. 추출된 자질들은 벡터 공간 모델로 표현되고, 문서 범주화 기법 중 하나인 지지 벡터 기계(support vector machine, SVM)는 이 정보들을 이용하여 질의 유형을 분류한다. 본 논문에서 제안하는 시스템은 질의 유형 분류 문제에지지 벡터 기계를 이용한 자동문서 범주화 기법을 도입하여 86.4%의 높은 분류 정확도를 보였다. 또한 질의 유형 분류기를 통계적 방법으로 구축함으로써 lexico-syntactic 패턴과 같은 규칙을 기술하는 수작업을 배제할 수 있으며, 응용 영역의 변화에 대해서도 안정적인 처리와 빠른 이식성을 보장한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.4C
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• pp.342-349
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• 2008

This paper presents a new digit-serial systolic multiplier over $CF(2^m)$ for cryptographic applications. When input data come in continuously, the proposed array produces multiplication results at a rate of one every ${\lceil}m/D{\rceil}$ clock cycles, where D is the selected digit size. Since the inner structure of the proposed array is tree-type, critical path increases logarithmically proportional to D. Therefore, the computation delay of the proposed architecture is significantly less than previously proposed digit-serial systolic multipliers whose critical path increases proportional to D. Furthermore, since the new architecture has the features of regularity, modularity, and unidirectional data flow, it is well suited to VLSI implementations.

• The KIPS Transactions:PartB
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• v.12B no.7 s.103
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• pp.761-766
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• 2005

This paper proposes a video model for the implementation of the cultural video database system. We have utilized an efficient scene change detection method that segments cultural video into semantic units for efficient indexing and retrieval of video. Since video has a large volume and needs to be played for a longer time, it implies difficulty of viewing the entire video. To solve this Problem. the cultural video abstraction was made to save the time and widen the choices of video the video abstract is the summarization of scenes, which includes important events produced by setting up the abstraction rule.

• The Transactions of the Korea Information Processing Society
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• v.4 no.7
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• pp.1851-1864
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• 1997

This paper presents an algorithm simplifying the ESOP function by several rules. The algorithm is repeatedly performing operations based on the state of each terms by the product transformation operation of two functions and thus it is simplifying the ESOP function through the reduction of the product terms. Through the minimization of the product terms of the multi-valued input binary multi-output function, an optimization of the input has been done using EXOR PLA with input decoder. The algorithm when applied to four valued arithmetic circuit has been used for a EXOR logic circuit design and the two bits input decoder has been used for a EXOR-PLA design. It has been found from a computer simulation(IBM PC486) that the suggested algorithm can reduce the product terms of the output function remarkably regardless of the number of input variables when the variable AND-EXOR PLA is applied to the poperation circuit.

• The Transactions of the Korea Information Processing Society
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• v.5 no.3
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• pp.833-841
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• 1998

The ann of this study is 10 propose all eff'tcient mclhod for partition of multi-dimensIOnal feature space into pattern subspace for automated generation of fuzzy rule. The suggested mclhod predicates on sequential subdivision of the fuzzy subspacc. and the size of construc1cd pattern space is variable. Under this procedure, n-dimensional pattern space, after considering the distributional characteristic patterns, is partitioned into two different pattern subspaces. From the two subspaces, the pattern space for further subdivision is chosen; then, this subdivision procedure recursively repeats itself until the stopping condition is fulfilled. The result of this study is applied to 2, 4, 7 band of satellite Landsat TM and satisfac10ry result is acquired.

• Journal of the Korean Society for information Management
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• v.15 no.2
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• pp.137-162
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• 1998

The purpose of this paper is to present core elements of bibliographic records to effective cataloging a variety of information materials such as monographs, non-book materials, serials, and internet resources. At first, AACR2R bibliographic data elements, the minimal level cataloging, and core records proposed by Progrma for Cooperative Cataloging(PCC) in Library of congress are discussed. After that elements of Core Records, dublin Core, KORMARC, and AACR2R are compared. Upon the results, this study suggests mandatory common core elements and optional core elements for cost-effective cataloging to all kinds of documents including internet resources.