• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.1
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• pp.211-218
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• 2000

This paper describes the improvement of broadband radio channel characteristics using a MMSE adaptive equalization technique as a fundamental study of high transmission rates in indoor radio channel. First, the performance of 16-QAM system that employs a MMSE linear adaptive equalizer in Rayleigh fading channel is analyzed. Next, in order to improve broadband radio channel characteristics, we apply an adaptive equalization technique employing the MMSE algorithm to the radio channel measured by using circularly polarized antenna under indoor NLOS(non-line-of sight) environment. Consequently, for 16-QAM with adaptive equalizer, we can achieve the improvement of about 13 dB at $10^{-3}$ error rate as compared with general 16-QAM. Moreover, it was found that the adaptive equalization technique could improve broadband radio channel characteristics over the all measured areas. Also, it was found that the employing both adaptive equalization and polarization diversity technique together could improve broadband radio channel characteristics and reduce fading more effectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.3
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• pp.643-650
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• 2014

A hardware implementation of phase calculator for extracting 3D depth image from TOF(Time-Of-Flight) sensor is described. The designed phase calculator adopts redundant binary number systems and a pipelined architecture to improve throughput and speed. It performs arctangent operation using vectoring mode of DCORDIC(Differential COordinate Rotation DIgital Computer) algorithm. Fixed-point MATLAB simulations are carried out to determine the optimal bit-widths and number of iteration. The phase calculator has ben verified by FPGA-in-the-loop verification using MATLAB/Simulink. A test chip has been fabricated using a TSMC $0.18-{\mu}m$ CMOS process, and test results show that the chip functions correctly. It has 82,000 gates and the estimated throughput is 400 MS/s at 400Mhz@1.8V.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.3
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• pp.526-534
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• 2014

In this paper, for the WiMedia Distributed Medium Access Control (D-MAC) protocol based on UWB. performance degradation due to the Distributed Reservation Protocol (DRP) conflict problem caused by devices' mobility is analyzed. And a DRP relay protocol and a DRP conflict resolution (CR) are proposed to overcome the performance degradation at DRP conflicts. In order to give the loser device at DRP conflicts a chance to maintain resources, the proposed DRP relay protocol executed at each device helps the loser device reserve an indirect link maintaining the required resources via a relay node. Simulation results considering the mobile environment have indicated that the DRP relay combined with the CR prevent the throughput decrease even though mobility of devices increases.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.2
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• pp.339-344
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• 2017

A novel structure of phase locked loop (PLL) which has small size and fast locking time with Early-late detector, Duty-rate modulator, and Lock status indicator (LSI) is proposed in this paper. The area of loop filter usually occupying the larger portion of the chip is minimized using a single small capacitor. While the conventional PLL with a single capacitor loop filter cannot work stably, the proposed PLL with two charge pumps works stably because the output voltage waveform of the proposed a single capacitor loop filter is the same as the output voltage waveform of the conventional 2nd-order loop filter. The two charge pumps are controlled by the Early-late detector which detects early-late status of UP and DN signals, and Duty-rate modulator which generates a steady duty-rate signal. Fast locking time is achieved using LSI. It has been simulated and proved by HSPICE in a CMOS $0.18{\mu}m$ 1.8V process.

• Journal of KIISE:Computer Systems and Theory
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• v.30 no.10
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• pp.586-594
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• 2003

X-Match algorithm is a lossless compression algorithm suitable for hardware implementation owing to its simplicity. It can compress 32 bits per clock cycle and is suitable for real time compression. However, as the bus width increases 64-bit, the compression unit also need to increase. This paper proposes the cooperative parallel X-Match (X-MatchCP) algorithm, which improves the compression speed by performing the two X-Match algorithms in parallel. It searches the all dictionary for two words, combines the compression codes of two words generated by parallel X-Match compression and outputs the combined code while the previous parallel X-Match algorithm searches an individual dictionary. The compression ratio in X-MatchCP is almost the same as in X-Match. X-MatchCP algorithm is described and simulated by Verilog hardware description language.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11B
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• pp.1522-1533
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• 2001

In this paper, we handle the estimation method of the received $E_{b}l1_{o}$ for forward closed-loop power control in cdma2000 systems. The estimation of MS-received $E_{b}l1_{o}$ utilizes the symbols related to the forward power control subchannel transmission. The estimation of the received bit energy and noise variance is analyzed for the frequency-selective Rayleigh fading channel. In order to improve SIR (signal-to-interference), the estimation of the received bit energy is made by the coherent combining of the rake-fingers and received I/Q symbols. And, in this paper, we evaluate the performance of forward closed-loop power control according to the mobile speed and the power adjustment step size in terms of the bit error rate (BER) and power control error. Simulation results present the optimal power adjustment step sizes according to the mobile speeds.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.1
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• pp.81-90
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• 2002

This paper presents an Implementation of digital high-performance position sensorless control system of Reluctance Synchronous Motor(RSM) drives with Direct Torque Control(DTC). The system consists of stator flux observer, speed and torque estimator, two digital hysteresis controllers, an optimal switching look-up table, Insulated Gate Bipolar Transistor(IGBT) voltage source inverter, and TMS320C31 DSP board. The stator flux observer Is based on the combined voltage and current model with stator flux feedback adaptive control of which inputs are current and voltage sensed on motor terminal for wide speed range. In order to prove the suggested sensorless control algorithm for industrial field application, we have some simulation and actual experiment at low and high speed range. The developed high-performance speed control by fully digital system are shown a good response characteristic of control results and high performance features using 1.0[kW] RSM having 2.57 reluctance ratio of $L_d/L_q$.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.19 no.9
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• pp.2022-2028
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• 2015

SpaceWire is a standard for high-speed links and networks between spacecraft components, which was invented for better, cheaper and faster on-board data handling in spacecraft. The standard defines timecode and its distribution which can be used for time synchronization among the nodes in a SpaceWire network. A timecode output from the time master which provides standard time over a SpaceWire network travels through links and routers to reach every nodes. While traveling, a timecode suffers from transmission delay and jitter which cause some difference in time synchronization among nodes. In this work, a simulator was developed using OMNeT++ to simulate the operation of a SpaceWire network and some analyses were performed on the transmission delay and jitter accompanied with a transmission of a timecode. The result will be used in the near future for the research of a precise time synchronization technique over a SpaceWire network.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.39 no.2
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• pp.121-127
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• 2011

This paper presents an autonomous formation flight algorithm for micro aerial vehicles (MAVs) and its flight test results. Since MAVs have severe limits on the payload and flight time, formation of MAVs can help alleviate the mission load of each MAV by sharing the tasks or coverage areas. The proposed formation guidance law is designed using nonlinear dynamic inversion method based on 'Leader-Follower' formation geometric relationship. The sensing of other vehicles in a formation is achieved by sharing the vehicles' states using a high-speed radio data link. the designed formation law was simulated with flight data of MAV to verify its robustness against sensor noises. A series of test flights were performed to validate the proposed formation guidance law. The test result shows that the proposed formation flight algorithm with inter-communication is feasible and yields satisfactory results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.3
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• pp.29-36
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• 2002

Recently, power quality problems in AC high-Speed Railway system have been raised, because heavy train and its higher speed are required in addition to new control system by using the Electronic devices. The installation/operation of the Series Capacitor(SC) has been only a device far voltage drop in power system up to now. However, the sufficient effectiveness of compensating In voltage drop has not been proved yet because of technical limitationf SC, and harmonic resonance is attracting a attention as one of new issues. Several problems are expected such as vocational problems of a traction substation, and overloading caused by a new construction of electric railway and the in transport. Therefore, extension of power feeding the fault in the traction substation should be also considered. So this paper represents the application of TSC-SVC on the electric railway power feeding system as a device of voltage compensation, and the simulations are executed through PSCAD/EMTDC.