• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.11A
• /
• pp.1263-1270
• /
• 2004

A low-power 64-point FFT/IFFT processor core is designed, which is an essential block in OFDM-based wireless LAM modems. The radix-2/418 DIF (Decimation-ln-Frequency) FFT algorithm is implemented using R2SDF (Radix-2 Single-path Delay Feedback) structure. Some design techniques for low-power implementation are considered from algorithm level to circuit level. Based on the analysis on infernal data flow, some unnecessary switching activities have been eliminated to minimize power dissipation. In circuit level, constant multipliers and complex-number multiplier in data-path are designed using truncation structure to reduce gate counts and power dissipation. The 64-point FFT/IFFT core designed in Verilog-HDL has about 28,100 gates, and timing simulation results using gate-level netlist with extracted SDF data show that it can safely operate up to 50-MHz＠2.5-V, resulting that a 64-point FFT/IFFT can be computed every 1.3-${\mu}\textrm{s}$. The functionality of the core was fully verified by FPGA implementation using various test vectors. The average SQNR of over 50-dB is achieved, and the average power consumption is about 69.3-mW with 50-MHz＠2.5-V.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.4B
• /
• pp.291-302
• /
• 2006

With the increasing deployment of mobile devices and the advent of broadband wireless access systems such as WiBro, WiMAX, and HSDPA, an efficient IP mobility management protocol becomes one of the most important technical issues for the successful deployment of the broadband wireless data networking service. IETF has proposed the Mobile IPv6(MIPv6) as the basic mobilitymanagement protocol for IPv6 networks. To enhance the performance of the basic MIPv6, researchers have been actively working on HMIPv6 and FMIPv6 protocols. In this paper, we propose a new mobility management protocol, HIMIPv6 (Highly Integrated MIPv6), which tightly integrates the hierarchical mobility management mechanism of the HMIPv6 and the proactive handover support of the FMIPv6 to enhance the handover performance especially for the cellular networking environment with high frequent handover activities. We have performed extensive simulation study using ns-2 and the results show that the proposed HIMIPv6 outperforms MIPv6, FMIPv6 and HMIPv6 in terms of signaling overhead, service interruption and packet lost during handovers.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.46 no.3
• /
• pp.1-8
• /
• 2009

DS-CDMA system has very low bandwidth efficiency, hence it is difficult to maintain high spreading gain for high speed data transmission. Offset stacked spreading CDMA(OSS-CDMA) is a transmission scheme where spreading codes with chip offsets are overlapped, then transmitted. This kind of system requires a code set that guarantees orthogonality between codes in the set of any cjip offset. An orthogonal complementary code set has a property that the crosscorrelation function between codes in the group is zero for all shifts, hence it can be used for an OSS-CDMA system. In an OCC-OSS CDMA system each user is assigned an orthogonal complementary code group. User data bit is spread by the given codes and overlapped, and the code sequences are transmitted with multicarrier. However, the offset stacked spread sequences are multilevel, and the number of symbol levels is increases as the spreading efficiency is increased. When the OSS sequence is transmitted with MPSK mapping, the signal constellation becomes dense, and the system is easily affected by channel impairments. In this paper, we propose a level clipping scheme on OSS sequence before MPSK modulated. Simulations have been carried out to investigate the BER performance of the OCC-OSS CDMA system in AWGN environment. The results show that proposed scheme outperform the scheme without level clipping.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.46 no.3
• /
• pp.48-58
• /
• 2009

Geo-graphical routing protocols as GPSR are known to be very suitable and useful for vehicular ad-hoc networks. However, a corresponding node can include some stale neighbor nodes being out of a transmission range, and the stale nodes are pone to get a high priority to be a next relay node in the greedy mode. In addition, some useful redundant information can be eliminated during planarization in the recovery mode. This paper deals with a new recovery mode, the Greedy Border Superiority Routing(GBSR), along with an Adaptive Neighbor list Management(ANM) scheme. Each node can easily treat stale nodes on its neighbor list by means of comparing previous and current Position of a neighbor. When a node meets the local maximum, it makes use of a border superior graph to recover from it. This approach improve the packet delivery ratio while it decreases the time to recover from the local maximum. We evaluate the performance of the proposed methods using a network simulator. The results shown that the proposed protocol reveals much better performance than GPSR protocol. Please Put the of paper here.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.31 no.8A
• /
• pp.745-751
• /
• 2006

The transmitter requires knowledge of the channel status information in order to adopt the adaptive modulation and coding scheme(AMC) for OFDM system. But in the outdoor environment which the users have high mobility, the channel status information from the users is outdated, so that it induces the degradation of system throughput and packet error rate(PER) performance. To solve this problem, researches about applying channel prediction technique to the AMC scheme have been proceeded. Most channel prediction techniques assume that there is no channel variation in the predefined time duration, e.g., a slot. As a result, those techniques cannot compensate the degradation of PER performance resulting from the rapid variation of channel during the slot duration. This paper introduces a novel channel prediction technique for OFDM/FDD system to support adaptive modulation and coding scheme over rapidly time-varying multipath fading channel. The proposed channel prediction technique considers the time-varying nature of channel during the slot duration. Simulation results show that the AMC scheme of OFDM/FDD system utilizing the proposed channel prediction technique can guarantee the target PER of 1% without any loss of system throughput compared with the case supported by the conventional channel prediction under ITU-R Veh A 30km/h.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.12A
• /
• pp.1319-1332
• /
• 2004

Multicarrier direct sequence code-division multiple access CDMA(MC DS-CDMA) is an attractive technique for achieving high data rate transmission even if the potentially large peak-to-average power ratio(PAPR) is an important factor for its application. On the other hand, code select CDMA(CS-CDMA) is an attractive technique with constant amplitude transmission of multicode signal irregardless of subchannels by introducing code selection method. In this paper we propose a new multiple access scheme based on the combination of MC DS-CDMA and CS-CDMA. Proposed scheme, which we called MC CS-CDMA, includes the sutclasses of MC DS-CDMA and CS-CDMA as special cases. The performance of this system is investigated for multipath Sequency selective fading channel and maximal ratio combining with rake receiver. In addition the PAPR of proposed system is compare with that of both MC BS-CDMA and CS-CDMA. Simulation results show that proposed system improves PAPR reduction than MC DS-CDMA at the expense of the complexity of receiver and the number of available non. Also, the numerical result shows that the proposed system is better performance than MC DS-CDMA due to the increasing processing gain and the number of time diversity gain.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.49 no.8
• /
• pp.1-11
• /
• 2012

The multi-code spread spectrum communication system, which spreads data bit stream by multiplexing orthogonal codes, can transmit data in high rate. However it needs the high-cost good linear amplifier because of the multi-level output signal. In order to overcome this drawback several systems making the amplitude of output signal constant with Walsh codes have been proposed. Recently constant amplitude pre-coded multi-code spread spectrum systems using extended m-sequence have been proposed. In this paper we consider an extended m-sequence based constant amplitude multi-code spread spectrum system with code set partitioning. By grouping the orthogonal codes into 4 subsets, not only is the computational complexity of the transceiver reduced but BER performance also improves. It has been shown that parity checking on four detected codes at the receiver can correct code detection error and result in BER performance enhancement. In this paper we propose a improved parity check receiver. We carried out computer simulation to verify feasibility of the proposed algorithm.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.49 no.12
• /
• pp.184-193
• /
• 2012

In this paper, a 5-bit 2-GS/s 2-way time interleaved pipeline ADC for high-speed serial link receiver is demonstrated. Implemented as a current-mode amplifier, the stage ADC simultaneously processes the tracking and residue amplification to achieve higher sampling rate. In addition, each stage incorporates a built-in 1-tap FIR equalizer, reducing inter-symbol-interference (ISI）without an extra digital post-processing. The ADC is designed in a 110nm CMOS technology. It comsumes 91mW from a 1.2-V supply. The area excluding the memory block is $0.58{\times}0.42mm^2$. Simulation results show that when equalizer is enabled, the ADC achieves SNDR of 25.2dB and ENOB of 3.9bits at 2.0GS/s sample rate for a Nyquist input signal. When the equalizer is disengaged, SNDR is 26.0dB for 20MHz-1.0GHz input signal, and the ENOB of 4.0bits.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.42 no.8 s.338
• /
• pp.35-42
• /
• 2005

This paper describes novel flip-flops with improved robustness and reduced power consumption. Variable sampling window flip-flop (VSWFF) adjusts the width of the sampling window according to input data, providing robust data latching as well as shorter hold time. The flip-flop also reduces power consumption for higher input switching activities as compared to the conventional low-power flip-flop. Clock swing-reduced variable sampling window flip-flop (CSR-VSWFF) reduces clock power consumption by allowing the use of a small swing clock. Unlike conventional reduced clock swing flip-flops, it requires no additional voltage higher than the supply voltage, eliminating design overhead related to the generation and distribution of this voltage. Simulation results indicate that the proposed flip-flops provide uniform latency for narrower sampling window and improved power-delay product as compared to conventional flip-flops. To evaluate the performance of the proposed flip-flops, test structures were designed and implemented in a $0.3\mu m$ CMOS process technology. Experimental result indicates that VSWFF yields power reduction for the maximum input switching activity, and a synchronous counter designed with CSR-VSWFF improves performance in terms of power consumption with no use of extra voltage higher than the supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.19 no.3
• /
• pp.376-383
• /
• 2008

Generally a return current plane(RCP) of high speed digital and analog part is partitioned. This is achieved in order to decrease the noise interference between subsystem in PCBs(Printed Circuit Boards). However, when the connected signal line exists between each subsystem, this partition will cause unwanted effects. In a EMI(Electromagnetic Interference) point of view, the partition of the return current plane becomes a primary factor to increase the radiated emission. Component bridge(CB) is used for the way of maintaining radiated emission, still specific user's guide doesn't give sufficient principle. In a view point of EMI, design principle of multi-CB using method will be analyzed by measurement. And design principle of noise mitigation will be provided. Generally interval of multi-CB is ${\lambda}/20$ ferrite bead. In this study, When multi-CB connection is applied, design principle of ferrite bead and chip resistor is proved by measurement. Multi-connected chip resistance$(0{\Omega})$ is proved to be more effective design method in the point of EMI.