• Title/Summary/Keyword: 경량 블록암호

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The fast implementation of block cipher SIMON using pre-computation with counter mode of operation (블록암호 SIMON의 카운터 모드 사전 연산 고속 구현)

  • Kwon, Hyeok-Dong;Jang, Kyung-Bae;Kim, Hyun-Ji;Seo, Hwa-Jeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.25 no.4
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    • pp.588-594
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    • 2021
  • SIMON, a lightweight block cipher developed by the US National Security Agency, is a family of block ciphers optimized for hardware implementation. It supports many kinds of standards to operate in various environments. The counter mode of operation is one of the operational modes. It provides to encrypt plaintext which is longer than the original size. The counter mode uses a constant(Nonce) and Counter value as an input value. Since Nonce is the identical for all blocks, so it always has same result when operates with other constant values. With this feature, it is possible to skip some instructions of round function by pre-computation. In general, the input value of SIMON is affected by the counter. However in an 8-bit environment, it is calculated in 8-bit units, so there is a part that can be pre-computed. In this paper, we focus the part that can be pre-calculated, and compare with previous works.

Optimization of LEA Quantum Circuits to Apply Grover's Algorithm (그루버 알고리즘 적용을 위한 LEA 양자 회로 최적화)

  • Jang, Kyung Bae;Kim, Hyun Jun;Park, Jae Hoon;Song, Gyeung Ju;Seo, Hwa Jeong
    • KIPS Transactions on Computer and Communication Systems
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    • v.10 no.4
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    • pp.101-106
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    • 2021
  • Quantum algorithms and quantum computers can break the security of many of the ciphers we currently use. If Grover's algorithm is applied to a symmetric key cipher with n-bit security level, the security level can be lowered to (n/2)-bit. In order to apply Grover's algorithm, it is most important to optimize the target cipher as a quantum circuit because the symmetric key cipher must be implemented as a quantum circuit in the oracle function. Accordingly, researches on implementing AES(Advanced Encryption Standard) or lightweight block ciphers as quantum circuits have been actively conducted in recent years. In this paper, korean lightweight block cipher LEA was optimized and implemented as a quantum circuit. Compared to the previous LEA quantum circuit implementation, quantum gates were used more, but qubits were drastically reduced, and performance evaluation was performed for this tradeoff problem. Finally, we evaluated quantum resources for applying Grover's algorithm to the proposed LEA implementation.

A Study on Pipeline Implementation of LEA Encryption·Decryption Block (LEA 암·복호화 블록 파이프라인 구현 연구)

  • Yoon, Gi Ha;Park, Seong Mo
    • Smart Media Journal
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    • v.6 no.3
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    • pp.9-14
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    • 2017
  • This paper is a study on the hardware implementation of the encryption and decryption block of the lightweight block cipher algorithm LEA which can be used for tiny devices in IoT environment. It accepts all secret keys with 128 bit, 192 bit, and 256 bit sizes and aims at the integrated implementation of encryption and decryption functions. It describes design results of applying pipeline method for performance enhancement. When a decryption function is executed, round keys are used in reverse order of encryption function. An efficient hardware implementation method for minimizing performance degradation are suggested. Considering the number of rounds are 24, 28, or 32 times according to the size of secret keys, pipeline of LEA is implemented so that 4 round function operations are executed in each pipeline stage.

A Hardware Implementation of SIMECK-64/128 Block Cipher Algorithm (SIMECK-64/128 블록암호 알고리듬의 하드웨어 구현)

  • Kim, Min-Ju;Jeong, Young-su;Shin, Kyung-Wook
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2021.10a
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    • pp.229-231
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    • 2021
  • In this paper, we describe a hardware design of the SIMECK block cipher algorithm that can be implemented in lightweight hardware with appropriate security strength. To achieve fast encryption and decryption operations, it was designed using two-step method that reduces the number of operation rounds. The designed SIMECK cryptographic core was implemented in Arty S7-50 FPGA device and its hardware operation was verified with a GUI using Python.

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The Statistical Analysis of Differential Probability Using GPGPU Technology (GPGPU 기술을 활용한 차분 확률의 통계적 분석)

  • Jo, Eunji;Kim, Seong-Gyeom;Hong, Deukjo;Sung, Jaechul;Hong, Seokhie
    • Journal of the Korea Institute of Information Security & Cryptology
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    • v.29 no.3
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    • pp.477-489
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    • 2019
  • In this paper, we experimentally verify the expected differential probability under the markov cipher assumption and the distribution of the differential probability. Firstly, we validate the expected differential probability of 6round-PRESENT of the lightweight block cipher under the markov cipher assumption by analyzing the empirical differential probability. Secondly, we demonstrate that even though the expected differential probability under the markov cipher assumption seems valid, the empirical distribution does not follow the well-known distribution of the differential probability. The results was deduced from the 4round-GIFT. Finally, in order to analyze whether the key-schedule affects the mis-matching phenomenon, we collect the results while changing the XOR positions of round keys on GIFT. The results show that the key-schedule is not the only factor to affect the mis-matching phenomenon. Leveraging on GPGPU technology, the data collection process can be performed about 157 times faster than using CPU only.

Differential Fault Analysis on Lightweight Block Cipher LBlock (경량 블록 암호 LBlock에 대한 차분 오류 공격)

  • Jeong, Ki-Tae;Lee, Chang-Hoon
    • Journal of Advanced Navigation Technology
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    • v.16 no.5
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    • pp.871-878
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    • 2012
  • LBlock is a 64-bit ultra-light block cipher suitable for the constrained environments such as wireless sensor network environments. In this paper, we propose a differential fault analysis on LBlock. Based on a random nibble fault model, our attack can recover the secret key of LBlock by using the exhaustive search of $2^{25}$ and five random nibble fault injection on average. It can be simulated on a general PC within a few seconds. This result is superior to known differential fault analytic result on LBlock.

Suggestion of CPA Attack and Countermeasure for Super-light Block Cryptographic CHAM (초경량 블록 암호 CHAM에 대한 CPA 공격과 대응기법 제안)

  • Kim, Hyun-Jun;Kwon, Hyeok-Dong;Kim, Kyung-Ho;Seo, Hwa-Jeong
    • Proceedings of the Korea Information Processing Society Conference
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    • 2019.10a
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    • pp.449-452
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    • 2019
  • 초 경량암호 CHAM은 자원이 제한된 장치 상에서 효율성이 뛰어난 덧셈, 회전연산, 그리고 XOR 연산으로 이루어진 알고리즘이다. CHAM은 특히 사물인터넷 플랫폼에서 높은 연산 성능을 보인다. 하지만 사물 인터넷 상에서 사용되는 경량 블록 암호화 알고리즘은 부채널 분석에 취약할 수 있다. 본 논문에서는 CHAM에 대한 1차 전력 분석 공격을 시도하여 부채널 공격에 대한 취약성을 증명한다. 이와 더불어 해당 공격을 안전하게 방어할 수 있도록 마스킹 기법을 적용하여 안전한 알고리즘을 제안한다.

Optimized Implementation of Lightweight Block cipher SPECK Counter Operation Mode on 32-bit RISC-V Processors (32-bit RISC-V 프로세서 상에서의 경량 블록 암호 SPECK 카운터 운용 모드 최적 구현)

  • Min-Joo Sim;Min-Woo Lee;Min-Ho Song;Hwa-Jeong Seo
    • Proceedings of the Korea Information Processing Society Conference
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    • 2023.05a
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    • pp.126-128
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    • 2023
  • 본 논문에서는 2-bit RISC-V 프로세서 상에서의 경량 블록 암호인 SPECK의 CTR 운용 모드에 대한 최적 구현을 제안한다. RISC-V 상에서의 SPECK 단일 평문과 2개의 평문에 대한 최적화와 고정된 논스 값을 사용하는 CTR 운용모드의 특징을 활용하여 일부 값에 대해 사전 연산을 하는 라운드 함수 최적화를 제안한다. 결과적으로, 레퍼런스 대비 제안된 기법은 단일 평문과 2개의 평문에 대해 각각 5.76배 2.24배 성능 향상을 확인하였으며, 사전 연산 기법을 적용하지 않은 최적 구현 대비 사전 연산 기법을 적용하였을 때, 1% 성능 향상을 확인하였다.

A SPECK Crypto-Core Supporting Eight Block/Key Sizes (8가지 블록/키 크기를 지원하는 SPECK 암호 코어)

  • Yang, Hyeon-Jun;Shin, Kyung-Wook
    • Journal of IKEEE
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    • v.24 no.2
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    • pp.468-474
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    • 2020
  • This paper describes the hardware implementation of SPECK, a lightweight block cipher algorithm developed for the security of applications with limited resources such as IoT and wireless sensor networks. The block cipher SPECK crypto-core supports 8 block/key sizes, and the internal data-path was designed with 16-bit for small gate counts. The final round key to be used for decryption is pre-generated through the key initialization process and stored with the initial key, enabling the encryption/decryption for consecutive blocks. It was also designed to process round operations and key scheduling independently to increase throughput. The hardware operation of the SPECK crypto-core was validated through FPGA verification, and it was implemented with 1,503 slices on the Virtex-5 FPGA device, and the maximum operating frequency was estimated to be 98 MHz. When it was synthesized with a 180 nm process, the maximum operating frequency was estimated to be 163 MHz, and the estimated throughput was in the range of 154 ~ 238 Mbps depending on the block/key sizes.

Optimized implementation of block cipher PIPO in parallel-way on 64-bit ARM Processors (64-bit ARM 프로세서 상에서의 블록암호 PIPO 병렬 최적 구현)

  • Eum, Si-Woo;Kwon, Hyeok-Dong;Kim, Hyun-Jun;Jang, Kyung-Bae;Kim, Hyun-Ji;Park, Jae-Hoon;Sim, Min-Joo;Song, Gyeong-Ju;Seo, Hwa-Jeong
    • Proceedings of the Korea Information Processing Society Conference
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    • 2021.05a
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    • pp.163-166
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    • 2021
  • ICISC'20에서 발표된 경량 블록암호 PIPO는 비트 슬라이스 기법 적용으로 효율적인 구현이 되었으며, 부채널 내성을 지니기에 안전하지 않은 환경에서도 안정적으로 사용 가능한 경량 블록암호이다. 본 논문에서는 ARM 프로세서를 대상으로 PIPO의 병렬 최적 구현을 제안한다. 제안하는 구현물은 8평문, 16평문의 병렬 암호화가 가능하다. 구현에는 최적의 명령어 활용, 레지스터 내부 정렬, 로테이션 연산 최적화 기법을 사용하였다. 구현은 A10x fusion 프로세서를 대상으로 한다. 대상 프로세서상에서, 기존 레퍼런스 PIPO 코드는 64/128, 64/256 규격에서 각각 34.6 cpb, 44.7 cpb의 성능을 가지나, 제안하는 기법은 8평문 64/128, 64/256 규격에서 각각 12.0 cpb, 15.6 cpb, 16평문 64/128, 64/256 규격에서 각각 6.3 cpb, 8.1 cpb의 성능을 보여준다. 이는 기존 대비 각 규격별로 8평문 병렬 구현물은 약 65.3%, 66.4%, 16평문 병렬 구현물은 약 81.8%, 82.1% 더 좋은 성능을 보인다.