• Communications of the Korean Institute of Information Scientists and Engineers
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• v.20 no.10
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• pp.21-28
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• 2002

• Proceedings of the Korean Information Science Society Conference
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• 2006.06a
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• pp.208-210
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• 2006

프로세서의 온도를 낮추기 위한 컴퓨터 과학적 접근법으로는 가변전압주파수조절(DVFS), 파이프라인에서 더 이상 명령어를 수행하지 못하게 하는 방법(pipeline throttling) 등이 있다. 하지만, 이러한 해결책은 대부분 소수의 은도 센서가 내장되어 있어 이를 기반으로 온도를 제어하였다. 본 논문에서는 실제 Pentium 4에 기반한 시스템을 통하여, 운영체제 레벨의 가변주파수방법(DFS)을 이용한 스케줄링이 여러 개의 온도센서를 사용하여 국지화된 뜨거운 부분(localized hotspot)을 얼마나 효율적으로 온도를 제어할 수 있는지를 보여준다.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.10
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• pp.562-574
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• 2004

We address the problem of energy-optimal voltage scheduling for fixed-priority hard real-time systems. First, we prove that the problem is NP-hard. Then, we present a fully polynomial time approximation scheme (FPTAS) for the problem. for any $\varepsilon$>0, the proposed approximation scheme computes a voltage schedule whose energy consumption is at most (1+$\varepsilon$) times that of the optimal voltage schedule. Furthermore, the running time of the proposed approximation scheme is bounded by a polynomial function of the number of input jobs and 1/$\varepsilon$. Experimental results show that the approximation scheme finds more efficient voltage schedules faster than the best existing heuristic.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.8
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• pp.1751-1758
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• 2003

This paper describes speed control of a permanent split capacitor single phase induction motor using SHE PWM inverters. The inverter is controlled by V55 microprocessor and its range is larger than other systems. Due to the V/F control with SHE(Selected Harmonic Elimination) PWM, continuously variable speed is attained and THD(Total Harmonic Distortion) is decreased. This is verified by simulations and experimental results.

• Journal of KIISE:Computing Practices and Letters
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• v.13 no.7
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• pp.454-461
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• 2007

Portable embedded systems have recently become smaller in size and offer a variety of junctions for users. These systems require high performance processors to handle the many functions and also a small battery to fit inside the system. However, due to its size, the battery life has become a major issue. It is important to have both efficient power design and management for each function, while optimizing processor voltage and clock frequency in order to extend the battery life of the system. In this paper, we calculated the efficiency of power in optimizing power rail. This system has two microprocessors. One is used to play music and movie files while the other is for DMB. In order to reduce power consumption, the DMB microprocessor is turned of while music or videos are played. Lastly, DVFS is applied to the processor in the system to reduce power consumption. Experimental results of the implemented system have resulted in reduced power consumption.

• Proceedings of the KIEE Conference
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• 2004.11c
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• pp.438-440
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• 2004

Energy consumption has become an increasingly important consideration in designing real-time embedded systems. In this paper, we propose a voltage scaling method to reduce energy consumption in fixed priority real-time systems using variable voltage processors. The Hyperperiod of tasks is divided into dimains. The most suitable voltage of each domain is determined off-line and stored in a table. During task execution, the voltage of processor is adjusted according to the information of the table. A simulation result shows that the proposed method can reduce 80% of power consumption in comparison to no power management. The difference to the optimal EDF based method is only 5%.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.2 no.2
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• pp.59-63
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• 1988

In a fixed AC power source the PWM techniques were used to vary the voltage and the fundamental frequency. The conventional PWM techniques due to the problem of commutation number and filter size have been studied the PWM output waveforms which applied the motor drive. However in this paper, the carrier frequency with sinusoidal PWM waveform is modulated from 10(KHz) to 45(KHz) using termination devices with high - speed switching capacity and applying LPF(Low Pass Filter) with small capacity to output of inverter and the PAM(Pulse Amplitude Modulation)is obtained. Considering the property of the speed and the control, the sinusoidal PWM control circuit was composed of the microprocessor and analog circuit. In experment result, the system properties are study on the sinusoidal voltage waveform with modulation index changing from 0.6 to 1.0.

• Proceedings of the Korean Information Science Society Conference
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• 2005.07a
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• pp.763-765
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• 2005

DVS(dynamic voltage sealing)은 이동형 프로세서에서 에너지 효율을 높이기 위한 필수 요소로 자리 잡고있다. DVS를 효과적으로 사용하기 위해선 대상 태스크의 특성과 하드웨어 특성에 맞는 DVS 알고리즘이 필요하다. 상품화 수준의 않은 운영체계들이 일정한 인터벌(interval)을 바탕으로 시스템 사용 상황을 분석하여 목표 성능을 결정하는 방식을 사용하고 있다. 이러한 방식은 태스크의 특성이 갑자기 변하여 성능을 요구할 경우 인터벌만큼의 시간이 진행된 후에야 반응 한다는 단점이 있다. 또한, 태스크 별 특성이 아닌 시스템 전체의 특성을 따르므로 이질적인 성격의 태스크들이 동시에 실행 되는 환경에는 적합하지 않다. 최근의 모바일 프로세서들은 수 마이크로초 수준의 성능 전환 시간을 제공하고 있으며 이 속도는 계속 줄어들고 있다. 프로세서의 고성능화로 인해 I/O 작업의 경우 프로세서 성능에 따른 실행 시간의 차이가 존재 하지 않는다. 이러한 두 가지 특성을 바탕으로 우리는 TIB(timer interrupt based) 알고리즘을 제안한다. TIB 알고리즘은 일정한 길이의 인터벌 대신 타임 슬라이스(time slice)를 성능 결정의 단위로 삼는다. 성능의 결정은 태스크 별로 이루어지며 각 태스크가 사용했던 이전 타임 슬라이스가 타이머 인터룹트(timer interrupt)에 의해 끝났다면 최대의 성능을 그 외의 경우는 최저의 성능으로 실행하게 된다. 이러한 접근 방식을 통해 I/O 작업이나 이벤트를 기다리는 태스크에 대해 최저 성능을 제공함으로써 실행 시간의 적은 손해를 대가로 많은 에너지 절감을 이룰 수 있다. 또한, 태스크의 속성이 변한 경우 타임 슬라이스 길이 만큼의 지체만을 허용하게 된다. 이러한 TIB 인터벌에 기반한 알고리즘에 비해 개별 태스크의 특성에 따른 성능 조절과 태스크의 변화에 따른 빠른 반응을 자랑으로 한다. 본 논문에선 TIB 알고리즘을 리눅스 커널에 구현하여 성능을 평가하였고 그 결과 리눅스에서 사용되는 기존 인터벌 기반의 알고리즘들에 비해 좋은 전력 절감 효과를 얻을 수 있었다.

• The Proceedings of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.7 no.3
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• pp.27-33
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• 1993

This paper presents the &tal controller for driving high frequency voltage fed PWM inverter that carrier frequency is over 2OkHz.We analyzed the conventional PWM to select a proper PWM pattern. as the result, obtained PWM pattern of the controller in which asynchronus staircase sinusoidal waveform is used as reference signal, and variable carrier ratio method was used for PWM control. The PWM controller is designed by fully digital method. Especially, Thk proposed controller is consisted of 8 bit one-chip microprocessor and digital logic. the former is for arithmetic and data processing, and the latter is for PWM pattern synthesis. Therefore, The responsibility and controllability is improved. Also, Data processing capability is improved using proper program to output modulation index with 9 bits. Circuits configuration of digital controller are made up of one chip 8051 and EPLD, and its controllability is tested by operating voltage fed inverter. Harmonics and current waveform is evaluated and analyzed for the voltage fed inverter system.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.1
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• pp.30-40
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• 2002

This paper studies the electronic ballast development for 250w MH lamps. We have improved the input power factor using a PFC IC. To provide the rating voltage required In the lamps, we have used the buck type dc-dc converter By this method, the stress of switching devices in inverter can be reduced. The inverter is the Full-Bridge type. To eliminate the acoustic resonance phenomena of MH lamps, we have added the high frequency sinewave voltage to the low frequency square-wave voltage to the lamp. We hove developed the igniter circuit using the L, C devices. We could control dimming of the lamp by varying the output voltage of the buck converter. The time of illuminating lamps and luminous intensity could be adjusted by season and time band. The buck converter output voltage can be controlled and the no load and over current situation were Protected by the development of the microprocessor Program.