• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1432-1433
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• 2006

$Li_{2}CO_3$ doped $Ba_{0.5}Sr_{0.5}TiO_3$ ceramics were fabrication by sol-gel method. Sintering temperature must be suited to the LTCC technology. Structure and dielectric properties were investigated for effect of $Li_{2}CO_3$ dopants at BST. Structure of $Li_{2}CO_3$ doped $Ba_{0.5}Sr_{0.5}TiO_3$ ceramics were dense and homogeneous with almost no pore. Relative permittivity was decreased and dielectric loss was increased with increasing $Li_{2}CO_3$ doping rations. In the case of the 3wt% $Li_{2}CO_3$ doped $Ba_{0.5}Sr_{0.5}TiO_3$ ceramics sintered at $900^{\circ}C$, relative permittivity and dielectric loss were 907 and 0.003 at 100 kHz.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.8 no.2
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• pp.221-226
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• 1998

Amorphous (Ba, Sr)$TiO_3$[BST] layer(30, 70 nm) was introduced between crystalline BST and $RuO_2$electrode to realize double-layered BST structure in order to improve the properties of BST film. The structure and surface morphology of double-layered BST film were modified by the application of amorphous BST layer; that is, surface became smoother and grain size increased abruptly. Amorphous layer thicker than 30 nm was effective to hinder the influence of $RuO_2$surface on the structure of as-grown BST films by in-situ process. Dielectric constant of double-layered BST film was improved dramatically from 152 to 340 and leakage current was lowered from $1.25{\times}10^{-5}A/{\textrm}{cm}^2);to;6.85{\times}10^{-7}A/{\textrm}{cm}^2$, respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.794-797
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• 2004

The object of investigation is represented by PbxSrl-xTiO3(PST) thin films, which were fabricated by the alkoxide-based sol-gel method on Pt/Ti/SiO2/Si substrate. We have investigated both structural and dielectric properties of PST thin films aimed to tunable microwave device applications as a function of Pb/Sr ratio. PST thin films showedtypical polycrystalline structure with a dense microstructure without secondary phase formation. Dielectric properties of PST films were found as strongly dependent on Pb/Sr composition ratio. Increasing of Pb content leads to simultaneous increasing of both dielectric constant and dielectric loss characteristics of PST films. The figure of merit (FOM) Parameter (FOM : (%) tunability / tan (%)) reached a maximal value of 27.5 corresponding to Pb/Sr ratio of 40/60. The tunability increased with increasing Pb content. The dielectric constants, dielectric loss and tunability of the PST thin films at Pb/sr ratio of 40/60 measured at 100 kHz were 335, 0.0174 and 47.89 %, respectively.

• Korean Journal of Materials Research
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• v.17 no.7
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• pp.386-389
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• 2007

The dielectric properties of $(Ba_{0.5}Sr_{0.5})TiO_3$ ferroelectric thin films have been investigated according to the substrates in order to optimize the their properties. MgO, r-plane sapphire, and poly-crystalline sapphire (Alumina) substrates have been used to deposite $(Ba_{0.5}Sr_{0.5})TiO_3$ ferroelectric thin films by RF magnetron sputtering. The BST thin films deposited on the single crystal (100)MgO substrates have high tunability and low dielectric loss. These results are caused by a low misfit between the lattice parameters of the BST films and the substrate. The BST films deposited on r-plane sapphire have relatively high misfit, and the tunability of 17% and dielectric loss of 0.0007. To improve the dielectric properties of the BST films, the post-annealing methods has been introduced. The BST films deposited on (100)MgO, (1102)r-plane sapphire, and poly-crystalline sapphire substrates have best properties in post-annealing conditions of $1050^{\circ}C$, $1100^{\circ}C$, and $1150^{\circ}C$, respectively. The different optimal post-annealing conditions have been found according to the different misfits between the films and substrates, and thermal expansion coefficients. Moreover, the films deposited on alumina substrate which is relatively cheap have a good tunability properties of 23% by the post-annealing.

• Proceedings of the KIEE Conference
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• 2008.10a
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• pp.173-174
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• 2008

페로브스카이트 구조의 (Ba,Sr,Ca)$TiO_3$ 분말에 $Dy_2O_3$ 불순물을 첨가하여 첨가량에 따른 영향을 연구하였다. 시편의 제작은 Screen-printing을 이용하여 후막으로 제작하였으며, 구조적인 특성과 전기적인 특성을 관찰하였다. XRD 회절 분석을 통하여 $Dy_2O_3$가 첨가된 모든 시편에서 이차상이 없는 전형적인 페로브스카이트 구조를 나타내었다. 시편의 미세구조를 관찰한 결과 grain size는 $Dy_2O_3$ 첨가량이 증가 할수록 감소하였으며, 기공은 증가하는 것을 알 수 있었다. 후막의 두께는 $Dy_2O_3$ 첨가량에 영향을 받지 않았으며 평균 두께는 $69{\mu}m$이었다. 큐리 온도는 $Dy_2O_3$ 첨가량에 따라 감소하였으며, 유전 손실은 상온 이상에서 1%이하로 크게 감소하였다.

• The Korean Journal of Ceramics
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• v.3 no.4
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• pp.274-278
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• 1997

(Ba, Sr) TiO$_3$(BST) thin films were prepared on RuO$_2$/Si substrates by rf magnetron sputtering and annealing was followed at temperatures ranging from 550 to 80$0^{\circ}C$ in $N_2$or $O_2$atmosphere. The effects of annealing conditions on the properties of BST film deposited on RuO$_2$bottom electrodes were investigated. It was found that the crystallinity. surface roughness, and grain size of BST films vary with the annealing temperature but they are not dependent upon the annealing atmosphere. The flat region in the current-voltage (I-V) curves of BST capacitors shortened with increasing annealing temperature under both atmospheres. This is believed to be due to the lowering of potential barrier caused by unstable interface and the increase of charge The shortening of the flat region by $O_2$annealing was more severe than that by $N_2$-annealing. As a result, there was no flat region when the films were annealed at 700 and 80$0^{\circ}C$ in $O_2$atmosphere. The dielectric properties of BST films were improved by annealing in either atmosphere. however, a degradation with frequency was observed when the films were annealed at relatively high temperature under $O_2$atmosphere.

• Korean Journal of Materials Research
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• v.5 no.1
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• pp.3-11
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• 1995

$(TiO_{2})$ thin films were deposited on p-Si(100) substrate by APMOCVD using titanium isopropoxide as a source material. The deposition mechanism was well explained by the simple boundary layer theory and the apparent activation energy of the chemical reaction controlled process was 18.2kcal /mol. The asdeposited films were polycrystalline anatase phase and were transformed into rutile phase after postannealing. The postannealing time and the film thikness as well as the postannealing temperature also affected the phase transition. The C-V plot exhibited typical charateristics of MOS diode, from which the dielectric constant of about 80 was obtained. The capacitance of the annealed film was decreased but those of the Nb or Sr doped films were not changed. I-V characteristics revealed that the conduction mechanism was hopping conduction. The postannealing and the doping of Nb or Sr cause to decrease the leakage current and to increase the breakdown voltage.

• Korean Journal of Crystallography
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• v.11 no.2
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• pp.95-101
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• 2000

Ferroelectric SrBi2Ta2O9 (SBT) thin films of Pt/Ti/SiO2 electrode were fabricated using a sintered SBT target with various Bi2O3 content by rf magnetron sputtering. Good hysteresis loop characteristics were observed in the SBT thin films deposited with 50mol% excess Bi target. SBT thin films crystallized from 650℃ however, good hysteresis loop can be obtained in the film annealed above 700℃. pt/TiO2/SiO2 and Pt/SiO2 electrodes were also used to investigate the Pt electrode dependence of SBT thin films. SBT thin films showed random oriented polycrystalline structure and similar morphology regardless of electrodes with quite different surface morphology. A 0.2㎛ thick SBT film annealed at 750℃ exhibited the remanent polarization (2Pr) of μC/㎠ and coercive voltage(Vc) of 1V at an applied voltage of 5V.

• Korean Journal of Materials Research
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• v.7 no.2
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• pp.107-113
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• 1997

$SrBi_{2}Ta_{2}O_{9}(SBT)$ thin films wcre prepared on $Pt/Ti/SiO_{2}/Si$ suhsrrate by pL~snia-enhanced chemical vapor deposition. Sr and Ta huhhling temperatures were kept ,it $120^{\circ}C$ Iron1 X- ray tiiffriict!on. n~icrostruc~ure. and composjrional analysis of SH7' films, respectivels Hi I~ut~t~lmg tempcl.arure was varied SR'I' thin tilrns dcpositcd ar i3i buhbling temperature of $130^{\circ}C$ have dielccrric constanr of 150 anti dissipation factor of 0 02 at IOOkFic. I .eakagc wrrent density of films was ahour $1.0{\times}10^{-8}A/cm^2$ at 20kV/cm. 1.eakage current i11amcrc1istic.s of Sli'l' films nras c.ontrolled by I'oole Frcnkel emission Kenianent polariziit~on and mercivc field oi SR\ulcorner' films annealed at $550^{\circ}C$ were $9{\mu}C/cm^2$ and 70kV/cm, respectively.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.6
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• pp.436-441
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• 1998

$Pt/SrTiO_3/Pb_x(Zr_{0.52}, Ti_{0.48})O_3/SrTiO_3/Si$ structure was prepared by rf-magnetron sputtering method for use in nondestructive read out ferroelectric RAM(NDRO-FEAM). PBx(Zr_{0.52}Ti_{0.48})O_3}$(PZT) and $SrTiO_3$(STO) films were deposited respectively at the temperatures of $300^{\circ}C and 500^{\circ}C$on p-Si(100) substrate. The role of the STO film as a buffer layer between the PZT film and the Si substrate was studied using X-ray diffraction (XRD), Auger electron spectroscopy (ASE), and scanning electron microscope(SEM). Structural analysis on the interfaces was carried out using a cross sectional transmission electron microscope(TEM). For PZT/Si structure, mostly Pb deficient pyrochlore phase was formed due to the serious diffusion of Pb into the Si substrate. On the other hand, for STO/PZT/STO/Si structure, the PZT film had perovskite phase and larger grain size with a little Pb interdiffusion. the interfaces of the PZT and the STO film, of the STO film and the interface layer and $SiO_2$, and of the $SiO_2$ and the Si substate had a good flatness. Across sectional TEM image showed the existence of an amorphous layer and $SiO_2$ with 7nm thickness between the STO film and the Si substrate. The electrical properties of MIFIS structure was characterized by C-V and I-V measurements. By 1MHz C-V characteristics Pt/STO(25nm)/PZT(160nm)/STO(25nm)/Si structure, memory window was about 1.2 V for and applied voltage of 5 V. Memory window increased by increasing the applied voltage and maximum voltage of memory window was 2 V for V applied. Memory window decreased by decreasing PZT film thickness to 110nm. Typical leakage current was abour $10{-8}$ A/cm for an applied voltage of 5 V.