• Current Photovoltaic Research
• /
• v.9 no.3
• /
• pp.96-105
• /
• 2021

Even though above 22% efficiencies have been reported in Cd-free Cu(In,Ga)Se₂ (CIGS) solar cell with Zn-containing buffers, the efficiencies with Zn-containing buffers, in general, are well below 20%. One of the reasons is Zn diffusion from the Zn-containing buffer layer to CIGS film during buffer growth. To avoid the degradation, it is necessary to prevent the diffusion of Zn atoms from Zn-containing buffer to CIGS film. For the purpose, we characterized an In₂Se₃ film as a possible diffusion barrier layer because In₂Se₃ has no Zn component. It was found that an In₂Se₃ layer grown at 300℃ was very effective in preventing Zn diffusion from a Zn-containing buffer. Also, the In₂Se₃ had a large potential barrier in the valence band at the In₂Se₃/CIGS interface. Therefore, In₂Se₃ passivation has the potential to achieve a super-high efficiency in CIGS solar cells that employ Cd-free ALD processed buffers containing Zn.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.26 no.10
• /
• pp.754-759
• /
• 2013

Aluminum oxide($Al_2O_3$) film deposited by atomic layer deposition (ALD) is known to supply excellent surface passivation properties on crystalline Si surfaces. Since $Al_2O_3$ has fixed negative charge, it forms effective surface passivation by field effect passivation on the rear side in p-type silicon solar cell. However, $Al_2O_3$ layer formed by ALD process needs very long process time, which is not applicable in mass production of silicon solar cells. In this paper, plasma-assisted ALD(PA-ALD) was applied to form $Al_2O_3$ to reduce the process time. $Al_2O_3$ synthesized by ALD on c-Si (100) wafers contains a very thin interfacial $SiO_2$ layer, which was confirmed by FTIR and TEM. To improve passivation quality of $Al_2O_3$ layer, the deposition temperature was changed in range of $150{\sim}350^{\circ}C$, then the annealing temperature and time were varied. As a result, the silicon wafer with aluminum oxide film formed in $250^{\circ}C$, $400^{\circ}C$ and 10 min for the deposition temperature, the annealing temperature and time, respectively, showed the best lifetime of 1.6ms. We also observed blistering with nanometer size during firing of $Al_2O_3$ deposited on p-type silicon.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2016.02a
• /
• pp.406-406
• /
• 2016

To get high efficiency n-type crystalline silicon solar cells, passivation is one of the key factor. Tunnel oxide (SiO2) reduce surface recombination as a passivation layer and it does not constrict the majority carrier flow. In this work, the passivation quality enhanced by different chemical solution such as HNO3, H2SO4:H2O2 and DI-water to make thin tunnel oxide layer on n-type crystalline silicon wafer and changes of characteristics by subsequent annealing process and firing process after phosphorus doped amorphous silicon (a-Si:H) deposition. The tunneling of carrier through oxide layer is checked through I-V measurement when the voltage is from -1 V to 1 V and interface state density also be calculated about $1{\times}1012cm-2eV-1$ using MIS (Metal-Insulator-Semiconductor) structure . Tunnel oxide produced by 68 wt% HNO3 for 5 min on $100^{\circ}C$, H2SO4:H2O2 for 5 min on $100^{\circ}C$ and DI-water for 60 min on $95^{\circ}C$. The oxide layer is measured thickness about 1.4~2.2 nm by spectral ellipsometry (SE) and properties as passivation layer by QSSPC (Quasi-Steady-state Photo Conductance). Tunnel oxide layer is capped with phosphorus doped amorphous silicon on both sides and additional annealing process improve lifetime from $3.25{\mu}s$ to $397{\mu}s$ and implied Voc from 544 mV to 690 mV after P-doped a-Si deposition, respectively. It will be expected that amorphous silicon is changed to poly silicon phase. Furthermore, lifetime and implied Voc were recovered by forming gas annealing (FGA) after firing process from $192{\mu}s$ to $786{\mu}s$. It is shown that the tunnel oxide layer is thermally stable.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.162-162
• /
• 2010

InSb has received great attentions as a promising candidate for the active layer of infrared photodetectors due to the well matched band gap for the detection of $3{\sim}5\;{\mu}m$ infrared (IR) wavelength and high electron mobility (106 cm2/Vs at 77 K). In the fabrication of InSb photodetectors, passivation step to suppress dark currents is the key process and intensive studies were conducted to deposit the high quality passivation layers on InSb. Silicon dioxide (SiO2), silicon nitride (Si3N4) and anodic oxide have been investigated as passivation layers and SiO2 is generally used in recent InSb detector fabrication technology due to its better interface properties than other candidates. However, even in SiO2, indium oxide and antimony oxide formation at SiO2/InSb interface has been a critical problem and these oxides prevent the further improvement of interface properties. Also, the mechanisms for the formation of interface phases are still not fully understood. In this study, we report the quantitative analysis of indium and antimony oxide formation at SiO2/InSb interface during plasma enhanced chemical vapor deposition at various growth temperatures and subsequent heat treatments. 30 nm-thick SiO2 layers were deposited on InSb at 120, 160, 200, 240 and $300^{\circ}C$, and analyzed by X-ray photoelectron spectroscopy (XPS). With increasing deposition temperature, contents of indium and antimony oxides were also increased due to the enhanced diffusion. In addition, the sample deposited at $120^{\circ}C$ was annealed at $300^{\circ}C$ for 10 and 30 min and the contents of interfacial oxides were analyzed. Compared to as-grown samples, annealed sample showed lower contents of antimony oxide. This result implies that reduction process of antimony oxide to elemental antimony occurred at the interface more actively than as-grown samples.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2012.08a
• /
• pp.80-81
• /
• 2012

Recently, one of the critical issues in the etching processes of the nanoscale devices is to achieve ultra-high aspect ratio contact (UHARC) profile without anomalous behaviors such as sidewall bowing, and twisting profile. To achieve this goal, the fluorocarbon plasmas with major advantage of the sidewall passivation have been used commonly with numerous additives to obtain the ideal etch profiles. However, they still suffer from formidable challenges such as tight limits of sidewall bowing and controlling the randomly distorted features in nanoscale etching profile. Furthermore, the absence of the available plasma simulation tools has made it difficult to develop revolutionary technologies to overcome these process limitations, including novel plasma chemistries, and plasma sources. As an effort to address these issues, we performed a fluorocarbon surface kinetic modeling based on the experimental plasma diagnostic data for silicon dioxide etching process under inductively coupled C4F6/Ar/O2 plasmas. For this work, the SiO2 etch rates were investigated with bulk plasma diagnostics tools such as Langmuir probe, cutoff probe and Quadruple Mass Spectrometer (QMS). The surface chemistries of the etched samples were measured by X-ray Photoelectron Spectrometer. To measure plasma parameters, the self-cleaned RF Langmuir probe was used for polymer deposition environment on the probe tip and double-checked by the cutoff probe which was known to be a precise plasma diagnostic tool for the electron density measurement. In addition, neutral and ion fluxes from bulk plasma were monitored with appearance methods using QMS signal. Based on these experimental data, we proposed a phenomenological, and realistic two-layer surface reaction model of SiO2 etch process under the overlying polymer passivation layer, considering material balance of deposition and etching through steady-state fluorocarbon layer. The predicted surface reaction modeling results showed good agreement with the experimental data. With the above studies of plasma surface reaction, we have developed a 3D topography simulator using the multi-layer level set algorithm and new memory saving technique, which is suitable in 3D UHARC etch simulation. Ballistic transports of neutral and ion species inside feature profile was considered by deterministic and Monte Carlo methods, respectively. In case of ultra-high aspect ratio contact hole etching, it is already well-known that the huge computational burden is required for realistic consideration of these ballistic transports. To address this issue, the related computational codes were efficiently parallelized for GPU (Graphic Processing Unit) computing, so that the total computation time could be improved more than few hundred times compared to the serial version. Finally, the 3D topography simulator was integrated with ballistic transport module and etch reaction model. Realistic etch-profile simulations with consideration of the sidewall polymer passivation layer were demonstrated.