• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.10 no.5
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• pp.455-461
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• 2017

In this paper, a local DL (Data Line) sensing method with smaller parasitic capacitance replacing the previous distributed DB sensing method with large parasitic capacitance is proposed to reduce the time to transfer BL (Bit Line) voltage to DL in the read mode. A new BL switching circuit turning on NMOS switches faster is also proposed. Furthermore, the access time is reduced to 35.63ns from 40ns in the read mode and thus meets the requirement since BL node voltage is clamped at 0.6V by a DL clamping circuit instead of precharging the node to VDD-VT and a differential amplifier are used. The layout size of the designed 512Kb EEPROM memory IP based on a $0.13{\mu}m$ BCD is $923.4{\mu}m{\times}1150.96{\mu}m$ ($=1.063mm^2$).

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.7
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• pp.1455-1462
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• 2012

In this paper, a BCD process based high-reliability 24-bit dual-port eFuse OTP Memory for PMICs is designed. We propose a comparison circuit at program-verify-read mode to test that the program datum is correct by using a dynamic pseudo NMOS logic circuit. The comparison result of the program datum with its read datum is outputted to PFb (pass fail bar) pin. Thus, the normal operation of the designed OTP memory can be verified easily by checking the PFb pin. Also we propose a sensing margin test circuit with a variable pull-up load out of consideration for resistance variations of programmed eFuse at program-verify-read mode. We design a 24-bit eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $289.9{\mu}m{\times}163.65{\mu}m$ ($=0.0475mm^2$).

• Proceedings of the Korean Society of Precision Engineering Conference
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• 1997.10a
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• pp.214-219
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• 1997

We propose a new scheme of high-resolution heterodyne interferometer that employs the two-axial mode He-Ne laser with an inter-mode beat frequency of 600-1000 MHz. An electronic RF-heterodyne circuit lowers the beat frequency down to 5 MHz, so that the phase change of the interferometer output is precisely measured with a displacement resolution of 0.1 nanometer without significant loss of dynamic bandwidth. A thermal control scheme is adopted to stabilize the cavity length with aims to suppress frequency drifts caused by the phenomena of frequency pulling and polarization anisotropy of the two-axial mode laser to a stability level of 2 parts in $10^9$. The two-axial mode HeNe laser yields a high output power of 2.0 mW, whlch allows us to perform multiple measurements of up to 10 machine axes simultaneously.

• Proceedings of the Optical Society of Korea Conference
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• 1990.02a
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• pp.260-263
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• 1990

We report the operation of an Nd+3 doped silica single mode fiber laser pumped by a 514.5nm Ar laser. A CW output power in excess of 0.27mW at 1.096um has been obtained with a sloped efficiency of 0.23% and a 15nm badnwidth.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.13 no.10
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• pp.4745-4750
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• 2012

In this paper a $6^{th}$ 1MHz~30MHz bandpass filter for Power line communication(PLC) modem receiver is designed using current mode synthesis method which is good to design the low-voltage and low-power filter. The designed bandpass filter is composed of cascade connecting between $3^{rd}$ Butterworth highpass filter and $3^{rd}$ Chebychev lowpass filter. As a core circuit in the current-mode filter, a current-mode integrator is designed with new architecture which can improve gain and unity gain frequency of the integrator. The gain and the unity gain frequency of the designed integrator is each 32.2dB and 247MHz. And the cutoff frequency of the designed $6^{th}$ bandpass filter can be controlled to 50MHz from 200KHz according to controlling voltage and the power consumption is 2.85mW with supply voltage, 1.8V. The designed bandpass filter was verified using a $0.18{\mu}m$ CMOS parameter.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.12
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• pp.14-21
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• 2009

In this paper, a Ka-band 10 W power amplifier module with seven power MMIC bare dies is designed and fabricated using MIC technology which combines multiple MMIC chips on a thin film substrate. Modified Wilkinson power dividers/combiners and CBFGCPW-Microstrip transitions for suppressing resonance and reducing connection loss are utilized for high-gain and high-power millimeter wave modules. A new TTL pulse timing control scheme is proposed to improve output power degradation due to large bypass capacitors in the gate bias circuit. Pulse-mode operation time is extended more than 200 nsec and output power increase of 0.62 W is achieved by applying the proposed scheme to the Ka-band 10 W power amplifier module operating in the pulsed condition of 10 kHz and $5\;{\mu}sec$. The implemented power amplifier module shows a power gain of 59.5 dB and an output power of 11.89 W.

• Journal of Broadcast Engineering
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• v.18 no.5
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• pp.691-701
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• 2013

In this paper, an early termination algorithm for merge process is proposed to reduce the computational complexity in High Efficiency Video Coding (HEVC) encoder. In the HEVC, the same candidate modes from merge candidate list (MCL) are shared to predict a merge or merge SKIP mode. This search process is performed by the number of the obtained candidates for the both of the merge and SKIP modes. This may cause some redundant search operations. To reduce this redundant search operation, we employ the neighboring blocks which have been encoded in prior, to check on the contextual information. In this study, the spatial, temporal and depth neighboring blocks have been considered to compute a correlation information. With this correlation information, an early termination algorithm for merge process is suggested. When all modes of neighboring blocks are SKIP modes, then the merge process performs only SKIP mode. Otherwise, usual merge process of HEVC is performed Through experimental results, the proposed method achieves a time-saving factor of about 21.25% on average with small loss of BD-rate, when comparing to the original HM 10.0 encoder.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.6
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• pp.899-905
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• 2001

This paper presents a triple-mode dielectric resonator far low loss and simple structure filter design. The BPF(Band Pass Filter) was designed using HFSS simulation results an4 fabricated using proposed resonators. The filter (3-stage BPF) has an insertion loss of about 0.9 dB at the center frequency of 1.93 GHz and a 3 dB bandwidth of about 25 MHz. If more complex characteristic is required, slot coupling between resonators can be used. Especially, the proposed BPF can be applied to the next generation mobile communication IMT-2000 system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.21-26
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• 2008

In this paper, a novel 622Mbps burst-mode clock and data recovery (CDR) circuit is proposed for passive optical network (PON) applications. The CDR circuits are implemented with 0.35um CMOS process technology. Locking dynamics is accomplished with instantaneous feature and data are sampled at an optimal timing. This is realized by seven different delay configurations, which are generated from precisely-controlled delay buffers. The experimental results show that the proposed CDR circuits are operating as expected, recovering an incoming 622Mbps burst-mode input data without errors.

• Proceedings of the IEEK Conference
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• 2003.07e
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• pp.2224-2227
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• 2003

본 논문에서는 비동기식 3 세대 이동통신망인 WCDMA의 표준 음성 부호화기인 AMR(Adaptive Multi-Rate)[1]과 VoIP(Voice over Internet Protocol) 응용분야에 최근 널리 활용되고 있는 ITU-T 8kbit/s 0.729A[2]의 효율적인 연동을 위한 상호부호화(transcoding) 알고리듬을 제안한다. AMR은 통신 채널 환경에 따라 4.75kbit/s부터 12.2kbit/s까지 가변 하여 통화품질을 보장한다. 따라서, 제안된 상호부호화 알고리듬은 순방향 8 모드, 역방향 8모드를 합하여 총 16모드를 지원한다. 제안된 알고리듬의 성능 평가를 위해 지연 추정, 연산량 측정과 주/객관적 음질평가를 수행한 결과, 제안한 알고리듬은 기존의 tandem보다 최소 5㎳의 짧은 지연, 평균 50.2％의 적은 연산량으로 우수한 음질의 복호화 음성 신호를 제공함을 확인하였다.