The Design of Capacitance Variation Detector for the Obstacle Detection System |
Kim, Jae-Min
(ASIC Laboratory, Korea University)
Song, Yun-Seob (ASIC Laboratory, Korea University) Yi, Sang-Yeoul (ASIC Laboratory, Korea University) Kim, Soo-Won (ASIC Laboratory, Korea University) |
1 | Behzad Razavi, 'Design of Analog CMOS Integrated Circuits', McGraw-Hill, pp. 495-509. 2001 |
2 | B. Gilbert, 'A High-performance Monolithic Multiplier Using Active Feed Back', IEEE J. SolidState Circuits, vol. SC-9, pp. 364-373, Dec. 1974 DOI ScienceOn |
3 | Shi-Cai Qin, 'A +5V CMOS Analog Multiplier', IEEE J. Solid-State Circuits, vol. SC-22, No.6, pp. 1143-1146, Dec. 1987 DOI |
4 | R. Jacob Baker, Harry W. Li, and David E. Boyce, 'CMOS Circuit Design, Layout, and Simulation', IEEE PRESS, pp. 685-703, 1998 |