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http://dx.doi.org/10.6109/jkiice.2008.12.5.893

Behavioral design aad verification of electronic circuits using CPPSIM  

Han, Jin-Seop (남부 대학교)
Abstract
Behavioral level simulations of LDO voltage regulator and phase locked loop(PLL) are performed with CPPSIM, a behavioral-level simulation tool based on C language. The validity of the simulation tool is examined by modeling analog circuits and simulating the circuits. In addition, the designed PLL adopted digital architecture to possess advantages of digital circuits.
Keywords
Behavioral level simulation; CPPSIM; Phase-Locked Loop; ADPLL;
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