Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Simultaneous Low-Temperature Plasma Annealing Process for Enhancing the Electrical Performance of a-IGZO Thin Film Transistors

a-IGZO 박막 트랜지스터의 전기적 성능 개선을 위한 동시 저온 플라즈마 어닐링 공정

  • Jung Hun Choi (College of Electrical and Computer Engineering, Chungbuk National University) ;
  • Jae-Yun Lee (College of Electrical and Computer Engineering, Chungbuk National University) ;
  • Beom Gu Lee (College of Electrical and Computer Engineering, Chungbuk National University) ;
  • Jung Moo Seo (College of Electrical and Computer Engineering, Chungbuk National University) ;
  • Sung-Jin Kim (College of Electrical and Computer Engineering, Chungbuk National University)
  • 최정훈 (충북대학교 전자정보대학) ;
  • 이재윤 (충북대학교 전자정보대학) ;
  • 이범구 (충북대학교 전자정보대학) ;
  • 서정무 (충북대학교 전자정보대학) ;
  • 김성진 (충북대학교 전자정보대학)
  • Received : 2024.07.29
  • Accepted : 2024.08.16
  • Published : 2024.11.01
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Abstract

The display industry has recently been at the forefront of innovative advancements in modern electronic devices. Technological progress such as flexible display holds significant potential across various application fields, particularly in wearable devices and rollable displays. A low-temperature process is essential for fabricating such displays. One of the key technologies in displays is the thin film transistor (TFT), with amorphous indium gallium zinc oxide (a-IGZO) receiving particular attention. a-IGZO is widely applied in high-performance displays due to its high charge mobility and stability. While a thermal treatment above 350℃ is typically required to maximize the electrical performance of a-IGZO TFTs, such high temperatures pose challenges for utilizing polymer substrates like plastics. Here, we thesis investigates the simultaneous low-temperature plasma annealing process to develop next-generation high-performance flexible display devices. To define the optimal temperature, devices were fabricated and analyzed at varying temperatures of 40℃, 80℃, 120℃, and 160℃. Experimental results indicated that devices fabricated at 160℃ and 80℃ exhibited superior performance, with those at 160℃ demonstrating better performance in terms of current ratio, threshold voltage, and subthreshold swing. These findings confirm that the simultaneous low-temperature plasma annealing process is effective for next-generation high-performance displays.

Keywords

Acknowledgement

This research was partly supported by Innovative Human Resource Development for Local Intellectualization program through the Institute of Information & Communications Technology Planning & Evaluation (IITP) grant funded by the Korea government (MSIT) IITP-2024-2020-0-01462 (34%), in part by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by Ministry of Education under Grant 2020R1A6A1A12047945 (33%), and in part by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education under Grant RS-2023-00249610 (33%).

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