Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
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Analysis and design of a current suppressor to mitigate the inrush current for a low-voltage DC distribution network

  • Chano Jeon (Hyundai Motor Company) ;
  • Kyung‑Wook Heo (School of Electrical Engineering, Ulsan National Institute of Science and Technology) ;
  • Jee‑Hoon Jung (School of Electrical Engineering, Ulsan National Institute of Science and Technology)
  • Received : 2023.11.26
  • Accepted : 2024.04.18
  • Published : 2024.07.20
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Abstract

This paper aims to analyze the inrush load current and develop an inrush current suppressor circuit optimized for a low-voltage DC (LVDC) distribution network. The connection of a substantial input capacitor in the DC load can induce a surge current, leading to significant issues in the LVDC distribution network, such as DC bus voltage drop and potential system damage. To address this issue, this paper presents the design of a voltage control system for a triple-active-bridge (TAB) converter in the LVDC distribution network, evaluating the need for the inrush current suppressor circuit. Control stability during the occurrence of the inrush current is analyzed using the small-signal model of the TAB converter. In addition, this paper proposes an inrush current suppressor circuit, presenting a design methodology to achieve the desired current suppression performance. Experiments are conducted on a laboratory-scale LVDC distribution network utilizing a 4-kW prototype converter to validate the performance of the suggested inrush current suppressor.

Keywords

Acknowledgement

This research was supported by the Korea Energy Technology Evaluation and Planning and Ministry of Trade, Industry and Energy under Grant (2019381010001A).

References

  1. Prabhala, V.A., Baddipadiga, B.P., Fajri, P., Ferdowsi, M.: An overview of direct current distribution system architectures & benefits. Energies 11(9), 2463 (2018). https://doi.org/10.3390/en11092463
  2. Engel, S.P., Soltau, N., Stagge, H., De Doncker, R.W.: Improved instantaneous current control for high-power three-phase dualactive bridge DC-DC converters. IEEE Trans. Power Electron. 29(8), 4067-4077 (2014) https://doi.org/10.1109/TPEL.2013.2283868
  3. Lee, J.Y., Choi, H.J., Kim, J.Y., Jung, J.H.: A control method to improve power conversion efficiency of three-level NPC-based dual active bridge converter. Trans. Korean Inst. Power Electron. 22(2), 150-158 (2017) https://doi.org/10.6113/TKPE.2017.22.2.150
  4. Cha, H., Jang, J., Park, H., Moon, G.: A current limiter using current-mode control for low-voltage DC distribution network. Proc. IEEE Int. Power Electron. Motion Control Conf., Harbin, China, pp. 1-6. (2016)
  5. Cao, H., Hong, S., Cho, G.: A current limiting control method for the inrush current suppression of a 48 V power outlet. IEEE Trans. Power Electron. 31(9), 6572-6582 (2016)
  6. Jiang, T., Cairoli, P., Rodrigues, R., Du, Y.: Inrush current limiting for solid state devices using NTC resistor. SoutheastCon 2017 Concord, NC, USA, 1-7 (2017)
  7. Kai, T.:Development of solid state circuit breakers for 380V DC microgrid Protection, NC state University (2017)
  8. Qin, H., Kimball, J.W.: Generalized average modeling of dual active bridge DC-DC converter. IEEE Trans. Power Electron. 27(4), 2078-2084 (2012) https://doi.org/10.1109/TPEL.2011.2165734
  9. Jeon, C., Heo, K.-W., Ryu, M.-H., Jung, J.-H.: Control technique of triple-active-bridge converter and its effective controller design based on small-signal model for islanding mode operation. Trans. Korean Inst. Power Electron. 27(3), 192-199 (2022)
  10. Yao, K., Ren, Y., Lee, F.C.: Critical bandwidth for the load transient response of voltage regulator modules. IEEE Trans. Power Electron. 19(6), 1454-1461 (2004). https://doi.org/10.1109/TPEL.2004.836669
  11. Kim, Y.D., Cho, K.M., Moon, G.W.: Hold up time extension technique for high efficiency, high power density server power supply. Trans. Korean Inst. Power Electron. 15(2), 96-102 (2010) https://doi.org/10.6113/TKPE.2010.15.2.96
  12. Jang, Y., Jovanovic, M.M., Dillman, D.L.: Hold-up time extension circuit with integrated magnetics. IEEE Trans. Power Electron. 21(2), 394-400 (2006). https://doi.org/10.1109/TPEL.2005.869750