Journal of Power Electronics

  • 제24권5호
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  • Pages.767-777
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  • 2024
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  • 1598-2092(pISSN)
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  • 2093-4718(eISSN)
전력전자학회 (The Korean Institute of Power Electronics)
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Hardware implementation of reliable designs for full SiC inverter-fed motor drive systems

  • Yun‑Jae Bae (Department of Electrical and Computer Engineering, Ajou University) ;
  • Hye‑Won Choi (Department of Electrical and Computer Engineering, Ajou University) ;
  • Yong‑Jin Kang (Application Platform Chapter, LS ELECTRIC) ;
  • Cheol‑Hyun Park (Application Platform Chapter, LS ELECTRIC) ;
  • Kyo‑Beum Lee (Department of Electrical and Computer Engineering, Ajou University)
  • 투고 : 2023.12.21
  • 심사 : 2024.02.28
  • 발행 : 2024.05.20
⟨ 이전 논문 다음 논문 ⟩

초록

This paper presents a hardware implementation for the reliable design of a full silicon carbide (SiC) inverter-fed motor drive system. SiC MOSFETs have been widely used in various applications due to their low switching losses, high voltage capabilities, and high-temperature operation capability. However, SiC MOSFETs are vulnerable to the overvoltage and overcurrent caused by the high switching frequencies and faults of parasitic inductance. The high speed of switching transitions causes high dv/dt, which leads to insulation failures of motor windings. In addition, the high di/dt, according to the parasitic inductance, can destroy the switching devices under short-circuit faults. A gate driver with desaturation protection is required to prevent short-circuit faults, and a passive filter should be installed to reduce the dv/dt to within prescribed values. This paper presents an optimized design process for a full SiC inverter-fed motor drive system with improved reliability. The effectiveness and validity of the process are verified through experimental results under various conditions.

키워드

참고문헌

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