Journal of Power Electronics

The Korean Institute of Power Electronics (전력전자학회)
권호 표지
DOI QR코드

DOI QR Code

Neutral point voltage balance and surge voltage reduction for three-level converters in PMSM starting process based on narrow pulse suppression

  • Li, Wenshan (School of Electronic, Electrical and Commutation Engineering, University of Chinese Academy of Science) ;
  • Wen, Xuhui (School of Electronic, Electrical and Commutation Engineering, University of Chinese Academy of Science) ;
  • Zhang, Jian (School of Electronic, Electrical and Commutation Engineering, University of Chinese Academy of Science) ;
  • Wang, Youlong (School of Electronic, Electrical and Commutation Engineering, University of Chinese Academy of Science)
  • Received : 2021.08.05
  • Accepted : 2022.01.24
  • Published : 2022.06.20
⟨ Previous Next ⟩

Abstract

This paper describes a narrow pulse suppression method that is called hybrid modulation strategy for T-type neutral point clamped (TNPC) three-level converters. Conventional VSVPWM does not function well in high-frequency TNPC converters due to the problem of narrow pulses during the permanent magnet synchronous motor (PMSM) starting process. The narrow pulse phenomenon occurs when the ON/OFF state time of the driving pulse is less than the minimum time required by the power devices. The narrow pulse threatens the safe operation of power devices and results in a high surge voltage and electromagnetic interference. In addition, neutral point voltage unbalance is caused by the narrow pulse in motor starting process. The effects of the narrow pulse on the surge voltage and the neutral point voltage are both discussed in this paper. The minimum pulse width function is designed to define the relationship between the gate drive signal and the modulation strategy. The switch pattern limited region of the virtual space vector modulation strategy is analyzed by the minimum pulse width function under both low and high modulation indexes. A resistance inductance load and a PMSM drive system test setup based on a TNPC three-level converter are both established to verify the analysis and effectiveness of the proposed method.

Keywords

Acknowledgement

Funding were provided by National Key Research and Development Program of China (Grant Number 2016YFB0100600), and Natural Science Foundation of Beijing Municipality (Grant Number 3192041).

References

  1. Dorn-Gomba, L., et al.: Power electronic converters in electric aircraft: current status, challenges, and emerging technologies. IEEE Trans. Transport. Electrif. 6(4), 1648-1664 (2020) https://doi.org/10.1109/tte.2020.3006045
  2. Duan, Z., Wen, X.: A new analytical conducted EMI prediction method for SiC motor drive systems. eTransportation 3, 100047 (2020) https://doi.org/10.1016/j.etran.2020.100047
  3. Schweizer, M., Kolar, J.W.: Design and implementation of a highly efficient three-level T-type converter for low-voltage applications. IEEE Trans. Power Electron. 28(2), 899-907 (2013) https://doi.org/10.1109/TPEL.2012.2203151
  4. Li, C., et al.: A modified neutral point balancing space vector modulation for three-level neutral point clamped converters in high-speed drives. IEEE Trans. Ind. Electron. 66(2), 910-921 (2019) https://doi.org/10.1109/tie.2018.2835372
  5. Wu, X., et al.: Virtual-space-vector PWM for a three-level neutral-point-clamped inverter with unbalanced DC-links. IEEE Trans. Power Electron. 33(3), 2630-2642 (2018) https://doi.org/10.1109/TPEL.2017.2692272
  6. Xiang, C., et al.: Improved virtual space vector modulation for three-level neutral-point-clamped converter with feedback of neutral-point voltage. IEEE Trans. Power Electron. 33(6), 5452-5464 (2018) https://doi.org/10.1109/tpel.2017.2737030
  7. Jiang, W., et al.: A novel virtual space vector modulation with reduced common-mode voltage and eliminated neutral point voltage oscillation for neutral point clamped three-level inverter. IEEE Trans. Ind. Electron. 67(2), 884-894 (2020) https://doi.org/10.1109/tie.2019.2899564
  8. Zhou, J., et al.: Balancing control of neutral-point voltage for three-level T-type inverter based on hybrid variable virtual space vector. IET Power Electron. 13(4), 744-750 (2020) https://doi.org/10.1049/iet-pel.2019.0759
  9. Yuan, Q., et al.: Dc-link capacitor voltage control for the NPC three-level inverter with a newly MPC-based virtual vector modulation. IET Power Electron. 13(5), 1093-1102 (2020) https://doi.org/10.1049/iet-pel.2019.0891
  10. Yun, S.-W., et al.: A new active zero state PWM algorithm for reducing the number of switchings. J. Power Electron. 17(1), 88-95 (2017) https://doi.org/10.6113/JPE.2017.17.1.88
  11. Gao, Z., et al.: Hybrid improved carrier-based PWM strategy for three-level neutral-point-clamped inverter with wide frequency range. IEEE Trans. Power Electron. 36(7), 8517-8538 (2021) https://doi.org/10.1109/TPEL.2020.3047952
  12. Liu, H.L., Cho, G.H.: Three-level space vector PWM in low index modulation region avoiding narrow pulse problem. IEEE Trans. Power Electron. 9(5), 481-486 (1994) https://doi.org/10.1109/63.321033
  13. Wang, Z., et al.: Busbar design and optimization for voltage overshoot mitigation of a silicon carbide high-power three-phase T-type inverter. IEEE Trans. Power Electron. 36(1), 204-214 (2021) https://doi.org/10.1109/tpel.2020.2998465
  14. Wan, W., et al.: A hybrid control method for neutral-point voltage balancing in three-level inverters. IEEE Trans. Power Electron. 36(8), 8575-8582 (2021) https://doi.org/10.1109/TPEL.2021.3051044
  15. Guan, B., Wang, C.: A narrow pulse compensation method for neutral-point-clamped three-level converters considering neutral-point balance. In: 2015 9th International Conference on Power Electronics and ECCE Asia (ICPE-ECCE Asia) (2015)
  16. Ben-Brahim, L., Tadakuma, S.: A novel multilevel carrier-based PWM-control method for GTO inverter in low index modulation region. IEEE Trans. Ind. Appl. 42(1), 121-127 (2006) https://doi.org/10.1109/TIA.2005.861321
  17. Hua, B., Zhengming, Z., Liqiang, Y.: Short timescale Pulse phenomena in three level high voltage and high power inverter. Proc. CSEE 06, 79-85 (2008)
  18. Kim, H., et al.: Analysis and compensation of inverter nonlinearity for three-level T-type inverters. IEEE Trans. Power Electron. 32(6), 4970-4980 (2017) https://doi.org/10.1109/TPEL.2016.2607226
  19. Minyu, Li., Xiaojun, Ma., Shugang, W., Hao, S., Yunyin, Z.: Research on narrow pulse suppression of three level virtual space vector pulse width modulation algorithm. Trans. China Electrotech. Soc. 33(14), 3264-3273 (2018)
  20. Wang, D., et al.: Online feedback dead time compensation strategy for three-level T-type inverters. IEEE Trans. Ind. Electron. 67(9), 7260-7268 (2020) https://doi.org/10.1109/tie.2019.2942558
  21. Hongwei, X., Yingjie, He., Jinjun, L., et al.: Research on vector asymmetric dead time compensation modulation strategy of three level inverter based on narrow pulse elimination. Proc. CSEE. 41(04), 1386-1397 (2021)
  22. Nair Meenu, D., et al.: Optimum hybrid SVPWM technique for three-level inverter on the basis of minimum RMS flux ripple. J. Power Electron. 19(2), 413-430 (2019) https://doi.org/10.6113/JPE.2019.19.2.413
  23. Jiao, Y., Lee, F.C., Lu, S.: Space vector modulation for three-level NPC converter with neutral point voltage balance and switching loss reduction. IEEE Trans. Power Electron. 29(10), 5579-5591 (2014) https://doi.org/10.1109/TPEL.2013.2294274