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Optimization Design of Non-Integer Decimation Filter for Compressing Satellite Synthetic Aperture Radar On-board Data

위성 탑재 영상레이다의 온보드 데이터 압축을 위한 비정수배 데시메이션 필터 최적화 설계 기법

  • Kang, Tae-Woong (The 3rd Research and Development Institute, Agency for Defense Development) ;
  • Lee, Hyon-Ik (The 3rd Research and Development Institute, Agency for Defense Development) ;
  • Lee, Young-Bok (The 3rd Research and Development Institute, Agency for Defense Development)
  • 강태웅 (국방과학연구소 제3기술연구본부) ;
  • 이현익 (국방과학연구소 제3기술연구본부) ;
  • 이영복 (국방과학연구소 제3기술연구본부)
  • Received : 2021.05.12
  • Accepted : 2021.09.03
  • Published : 2021.10.05

Abstract

The on-board processor of satellite Synthetic Aperture Radar(SAR) digitizes the back-scattered echoes and transmits them to the ground. As satellite SAR image of various operating conditions including broadband and high resolution is required, an enormous amount of SAR data is generated. Decimation filter is used for data compression to improve the transmission efficiency of these data. Decimation filter is implemented with the FIR(Finite Impulse Response) filter and here, the decimation ratio and tap length are constrained by resource requirements of FPGA used for implementation. This paper suggests to use a non-integer ratio decimation filter in order to optimize the data transmission efficiency. Also, it proposes a filter design method that remarkably reduces the resource constraints of the FPGA in-use via applying a polyphase filter structure. The required resources for implementing the proposed filter is analysed in this paper.

Keywords

References

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