Journal of Power Electronics

  • 제20권1호
  • /
  • Pages.1-10
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  • 2020
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  • 1598-2092(pISSN)
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  • 2093-4718(eISSN)
전력전자학회 (The Korean Institute of Power Electronics)
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Non-isolated input-series-output-parallel three-level buck converter

  • Chen, Jianfei (Department of Electrical and Computer Engineering, Wayne State University) ;
  • Duan, Chen (Department of Electrical and Computer Engineering, Wayne State University) ;
  • Wang, Caisheng (Department of Electrical and Computer Engineering, Wayne State University)
  • 투고 : 2018.03.25
  • 심사 : 2019.07.18
  • 발행 : 2020.01.20
⟨ 이전 논문 다음 논문 ⟩

초록

This paper proposes a non-isolated input-series-output-parallel (ISOP) three-level buck converter. A theoretical analysis indicates that it has a large step-down ratio and low component voltage stress with the input and output terminals sharing the same ground. An automatic current-balancing mechanism is revealed, and it indicates that the parasitic parameters and inductance variations influence the automatic current-balancing effect. Thus, current-balance control is necessary. Considering that the proposed topology has an ISOP configuration, two voltage-balance control strategies are proposed to realize input capacitor voltage balancing and output inductor current balancing. One is implemented based on a two-loop configuration with an output voltage loop and a voltage-balance loop. The other is developed based on a three-loop configuration by adding one inner current loop on the two-loop configuration. Finally, experimental results have been given to verify both the proposed converter and voltage-balance control.

키워드

참고문헌

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