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Gate driver for parallel connection SiC MOSFETs with over-current protection and dynamic current balancing scheme

  • Received : 2019.06.03
  • Accepted : 2019.09.06
  • Published : 2020.01.20

Abstract

In this paper, a SiC MOSFETs gate driver for parallel connections is proposed and implemented. The proposed design enhances the reliability of parallel-connected SiC MOSFETs in high-frequency applications. High-speed over-current protections are applied for both over-voltage and under-voltage situations. In addition, a dynamic balancing current sharing scheme for SiC MOSFETs is proposed for high-speed parallel applications by current feedback and switching delay time compensation. With the proposed design, parallel-connected SiC MOSFETs can work at an operation frequency of 1 MHz with over-current protections. In addition, with the dynamic current balancing scheme, the operation temperature decreases from 115 to 86.9 ℃, while the temperature difference for paralleled devices drops from 25.8 to 1.8 ℃.

Keywords

Acknowledgement

This work is supported by National Key R&D Program of China (Grant No. 2017YFB0102302).

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