Journal of Power Electronics

  • 제20권3호
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  • Pages.794-801
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  • 2020
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  • 1598-2092(pISSN)
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  • 2093-4718(eISSN)
전력전자학회 (The Korean Institute of Power Electronics)
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Offset error compensation algorithm for grid voltage measurement of grid-connected single-phase inverters based on SRF-PLL

  • Hwang, Seon-Hwan (Department of Electrical Engineering, Kyungnam University) ;
  • Seo, Sung-Woo (Department of Electrical Engineering, Kyungnam University)
  • 투고 : 2020.01.16
  • 심사 : 2020.03.18
  • 발행 : 2020.05.20
⟨ 이전 논문 다음 논문 ⟩

초록

This paper proposes a method for compensating the offset error in the grid voltage measurement process of grid-connected single-phase inverters. In general, the offset error in the grid voltage sampling process results in a fundamental frequency component in the synchronous reference frame phase locked loop (SRF-PLL). As a result, the dq-axis currents and phase current based on the synchronous reference frame PI current regulator include the unwanted DC component, as well as first- and second-order harmonic ripples when compared with the grid frequency due to the distorted grid angle. Therefore, in this paper, the influences of the offset error are mathematically analyzed based on the SRF-PLL. In particular, the d-axis integrator output of the SRF-PLL with a PI controller is selected to detect the offset error. Then it is compensated using a simple proportional-integral controller. Moreover, the root mean square function is easily applied to obtain the offset error. The usefulness of the proposed algorithm is verified through simulation and experimental results.

키워드

과제정보

This work was supported by Kyungnam University Foundation Grant, 2016.

참고문헌

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피인용 문헌

  1. Active noise cancellation frequency-locked loop with a notch filter vol.21, pp.12, 2020, https://doi.org/10.1007/s43236-021-00310-z