반도체 전공정의 하드마스크 스트립 검사시스템 개발

Development of Hard Mask Strip Inspection System for Semiconductor Wafer Manufacturing Process

  • Lee, Jonghwan (School of Industrial Engineering Kumoh National Institute of Technology) ;
  • Jung, Seong Wook (DH Tach) ;
  • Kim, Min Je (School of Industrial Engineering Kumoh National Institute of Technology)
  • 투고 : 2020.08.27
  • 심사 : 2020.09.11
  • 발행 : 2020.09.30

초록

The hard mask photo-resist strip inspection system for the semiconductor wafer manufacturing process inspects the position of the circuit pattern formed on the wafer by measuring the distance from the edge of the wafer to the strip processing area. After that, it is an inspection system that enables you to check the process status in real time. Process defects can be significantly reduced by applying a tester that has not been applied to the existing wafer strip process, edge etching process, and wafer ashing process. In addition, it is a technology for localizing semiconductor process inspection equipment that can analyze the outer diameter of the wafer and the state of pattern formation, which can secure process stability and improve wafer edge yield.

키워드

참고문헌

  1. Yong Huang, Jialei Liu, Zhiyong, Jing Zhao and Huanxin Liu, "Optimization of Wet Strip after Metal Hard Mask All-in-One Etch for metal void reduction and yield improvement," China Semiconductor Technology International Conference, 2017.
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