실리콘 웨이퍼 습식 식각장치 설계 및 공정개발

Design of Single-wafer Wet Etching Bath for Silicon Wafer Etching

  • Kim, Jae Hwan (Department of Electronics Engineering, Myongjj University) ;
  • Lee, Yongil (Department of Electronics Engineering, Myongjj University) ;
  • Hong, Sang Jeen (Department of Electronics Engineering, Myongjj University)
  • 투고 : 2020.06.15
  • 심사 : 2020.06.23
  • 발행 : 2020.06.30

초록

Silicon wafer etching in micro electro mechanical systems (MEMS) fabrication is challenging to form 3-D structures. Well known Si-wet etch of silicon employs potassium hydroxide (KOH), tetramethylammonium hydroxide (TMAH) and sodium hydroxide (NaOH). However, the existing silicon wet etching process has a fatal disadvantage that etching of the back side of the wafer is hard to avoid. In this study, a wet etching bath for 150 mm wafers was designed to prevent back-side etching of silicon wafer, and we demonstrated the optimized process recipe to have anisotropic wet etching of silicon wafer without any damage on the backside. We also presented the design of wet bath for 300 mm wafer processing as a promising process development.

키워드

참고문헌

  1. S. Noh and S. You, "Optimum Process Conditions for Supercritical Fluid and Co-solvents Process for the Etching, Rinsing and Drying of MEMS-wafers", Journal of the Semiconductor & Display Technology, Vol. 16, No. 3, pp.41-46, 2007.
  2. M. Yun, “Investigation of KOH Anisotropic Etching for the Fabrication of Sharp Tips in Silicon-on-Insulator (SOI) Material,” Journal of the Koran Physical Society, Vol. 37, No. 5, pp. 605-610, 2000. https://doi.org/10.3938/jkps.37.605
  3. K. Biswas and S. Kal, "Etch Characteristics of KOH, TMAH and Dual Doper TMAH for Bulk Micromachining of Silicon," Journal of Microelectronics, Vol. 37, pp. 519-525, 2006 https://doi.org/10.1016/j.mejo.2005.07.012
  4. R. Bhandari, S. Negi, L. Rieth and F. Solzbacher, "A Wafer-scale Etching Technique for High Aspect Ratio Implantable MEMS Structures," Sensors and Actuators A: Physical, Vol. 162, No.1, pp. 130-136, 2010. https://doi.org/10.1016/j.sna.2010.06.011
  5. S. Dutta, R. Pal, P. Kumar, O.P. Hooda, J. Singh, Shaveta, G. Saxena, P. Datta and R. Chatterjee, “Fabrication Challenges for Realization of Wet Etching Based Comb Type Capacitive Microaccelerometer Structure,” Sensors & Transducers, Vol. 111, No. 12, pp. 18-24, 2009.
  6. D. Lee, K. Yu, U. Krishnamoorthy and O. Solgaard, "Vertical Mirror Fabrication Combining KOH Etch and DRIE of (110) Silicon", Journal of Microelectromechanical Systems, Vol. 18, No. 1, pp.217-227, 2008. https://doi.org/10.1109/JMEMS.2008.2009840
  7. H. Ni, H. Lee and A. G. Ramirez. "A Robust Two-step Etching Process for Large-scale Microfabricated $SiO_2$ and $Si_3N_4$ MEMS Membranes," Sensors and Actuators A: Physical 119.2 (2005): 553-558. https://doi.org/10.1016/j.sna.2004.10.033
  8. C. Yang, P. Chen, C. Yang, Y, Chiou and R. Lee, “Effects of Various Ion-typed Surfactants on Silicon Anisotropic Etching Properties in KOH and TMAH Solutions,” Sensors and Actuators A: Physical, Vol. 119, No. 1, pp. 271-281, 2005. https://doi.org/10.1016/j.sna.2004.09.017
  9. K.R. Wiliams "Etch Rate for Micromachining Processing-Part II", Journal of Microelectromechanical Systems, Vol. 12, No. 6, pp. 761-778, 2003. https://doi.org/10.1109/JMEMS.2003.820936
  10. D.L. Kendall and R.A. Shoultz, "Wet Chemical Etching of Silicon and $SiO_2$, and Ten Challenges for Micromachiners," Handbook of Microlithography, Micromachining, and Microfabrication, Volume 2: Micromachining and Microfabrication, pp. 43-89, 1997.
  11. Y. Ahn, H. Kim, K. Koo and J. Cho, "Etching Method of Thin Film on the Backside of Wafer Using Single Wafer Processing Tool", Journal of the Semiconductor & Display Equipment Technology, Vol. 5, No. 2, pp. 47-49, 2006.