Journal of Sensor Science and Technology (센서학회지)

The Korean Sensors Society (한국센서학회)
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Design and Implementation of a Low Power Chip with Robust Physical Unclonable Functions on Sensor Systems

센서 시스템에서의 고신뢰 물리적 복제방지 기능의 저전력 칩 설계 및 구현

  • Choi, Jae-min (Department of Electronic Engineering, Daegu University) ;
  • Kim, Kyung Ki (Department of Electronic Engineering, Daegu University)
  • Received : 2018.01.22
  • Accepted : 2018.01.29
  • Published : 2018.01.31
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Abstract

Among Internet of things (IoT) applications, the most demanding requirements for the widespread realization of many IoT visions are security and low power. In terms of security, IoT applications include tasks that are rarely addressed before such as secure computation, trusted sensing, and communication, privacy, and so on. These tasks ask for new and better techniques for the protection of data, software, and hardware. An integral part of hardware cryptographic primitives are secret keys and unique IDs. Physical Unclonable Functions(PUF) are a unique class of circuits that leverage the inherent variations in manufacturing process to create unique, unclonable IDs and secret keys. In this paper, we propose a low power Arbiter PUF circuit with low error rate and high reliability compared with conventional arbiter PUFs. The proposed PUF utilizes a power gating structure to save the power consumption in sleep mode, and uses a razor flip-flop to increase reliability. PUF has been designed and implemented using a FPGA and a ASIC chip (a 0.35 um technology). Experimental results show that our proposed PUF solves the metastability problem and reduce the power consumption of PUF compared to the conventional Arbiter PUF. It is expected that the proposed PUF can be used in systems required low power consumption and high reliability such as low power encryption processors and low power biomedical systems.

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References

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