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Low-Complexity Multi-size Cyclic-Shifter for QC-LDPC Codes

  • Kang, Hyeong-Ju (School of Computer Science and Engineering, Korea University of Technology and Education) ;
  • Yang, Byung-Do (Department of Electronics Engineering, Chungbuk National University)
  • Received : 2016.05.23
  • Accepted : 2016.12.14
  • Published : 2017.06.01

Abstract

The decoding process of a quasi-cyclic low-density parity check code requires a unique type of rotator. These rotators, called multi-size cyclic-shifters (MSCSs), rotate input data with various sizes, where the size is the amount of data to be rotated. This paper proposes a low-complexity MSCS structure for the case when the sizes have a nontrivial common divisor. By combining the strong points of two previous structures, the proposed structure achieves the smallest area. The experimental results show that the area reduction was more than 14.7% when the proposed structure was applied to IEEE 802.16e as an example.

Keywords

References

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Cited by

  1. Low‐complexity, high‐speed multi‐size cyclic‐shifter for quasi‐cyclic LDPC decoder vol.54, pp.7, 2017, https://doi.org/10.1049/el.2017.4456