전기전자학회논문지 (Journal of IKEEE)

  • 제21권3호
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  • Pages.284-287
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  • 2017
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  • 1226-7244(pISSN)
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  • 2288-243X(eISSN)
한국전기전자학회 (Institute of Korean Electrical and Electronics Engineers)
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채널 길이의 변화에 따른 단일 게이트 피드백 전계효과 트랜지스터의 메모리 윈도우 특성

Effect of Channel Length Variation on Memory Window Characteristics of single-gated feedback field-effect transistors

  • Cho, Jinsun (Dept. of Semiconductor Systems Engineering, Korea University) ;
  • Kim, Minsuk (Dept. of Electrical Engineering, Korea University) ;
  • Woo, Sola (Dept. of Electrical Engineering, Korea University) ;
  • Kang, Hyungu (Dept. of Electrical Engineering, Korea University) ;
  • Kim, Sangsig (Dept. of Electrical Engineering, Korea University)
  • 투고 : 2017.09.04
  • 심사 : 2017.09.21
  • 발행 : 2017.09.30
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초록

본 연구에서는 3차원 소자 시뮬레이션을 통하여 단일 게이트 피드백 전계효과 트랜지스터의 전기적 특성과 채널 길이에 따른 메모리 윈도우 특성 변화를 확인하였다. 소자의 채널 길이는 50 nm에서 100 nm까지 변화시켜가며 시뮬레이션을 수행하였다. 시뮬레이션 결과 0에 가까운 문턱전압이하 기울기(< 1 mV/dec)와 ${\sim}1.27{\times}10^{10}$의 $I_{on}/I_{off}$ 비율을 얻었다. 또한 메모리 윈도우를 확인한 결과 채널 길이 50 nm의 소자는 0.31 V의 메모리 윈도우가 생성되었으나 채널 길이 100 nm의 소자는 메모리 윈도우가 생성되지 않았다.

In this study, we examined the simulated electrical characteristics of single-gated feedback field effect transistors (FBFETs) and the influence of channel length variation of the memory window characteristics through the 3D device simulation. The simulations were carried out for various channel lengths from 50 nm to 100 nm. The FBFETs exhibited zero SS(< 1 mV/dec) and a current $I_{on}/I_{off}$ ratio${\sim}1.27{\times}10^{10}$. In addition, the memory windows were 0.31 V for 50 nm-channel-length devices while no memory windows were observed for 100 nm-channel-length devices.

키워드

참고문헌

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피인용 문헌

  1. 게이트 절연막과 게이트 전극물질의 변화에 따른 피드백 전계효과 트랜지스터의 히스테리시스 특성 확인 vol.22, pp.2, 2018, https://doi.org/10.7471/ikeee.2018.22.2.488