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Design of A Multimedia Bitstream ASIP for Multiple CABAC Standards

  • Choi, Seung-Hyun (Department of Computer Engineering, Kwangwoon University) ;
  • Lee, Seong-Won (Department of Computer Engineering, Kwangwoon University)
  • Received : 2017.06.30
  • Accepted : 2017.07.14
  • Published : 2017.08.30

Abstract

The complexity of image compression algorithms has increased in order to improve image compression efficiency. One way to resolve high computational complexity is parallel processing. However, entropy coding, which is lossless compression, does not fit into the parallel processing form because of the correlation between consecutive symbols. This paper proposes a new application-specific instruction set processor (ASIP) platform by adding new context-adaptive binary arithmetic coding (CABAC) instructions to the existing platform to quickly process a variety of entropy coding. The newly added instructions work without conflicts with all other existing instructions of the platform, providing the flexibility to handle many coding standards with fast processing speeds. CABAC software is implemented for High Efficiency Video Coding (HEVC) and the performance of the proposed ASIP platform was verified with a field programmable gate array simulation.

Keywords

References

  1. C. Chi, M. Alvarez-Mesa, B. Juulink, G. Clare, F. Henry, S. Pateux, and T. Schierl, "Parallel Scalability and Efficiency of HEVC Parallelization Approaches," IEEE Trans. Circuits Syst. Video Technol., vol. 22, no. 12, pp. 1827-1838, Dec. 2012. https://doi.org/10.1109/TCSVT.2012.2223056
  2. H. Ryu, Y-J. Ahn, J-S. Mok, and D. Sim, "Performance Analysis of HEVC Parallelization Methods for High Resolution Videos", IEIE Transactions on Smart Processing and Computing, Vol.4, No. 1, Feb. 2015.
  3. T. Chen et al., "Architecture Design of Context- Based Adaptive Variable-Length Coding for H.264/AVC," IEEE Transactions on circuits and systems, Vol.53, No. 9, pp. 832-836, Sep. 2006. https://doi.org/10.1109/TCSII.2006.880014
  4. D. Marpe et al., "Context-based adaptive binary arithmetic coding in the H.264/AVC video compression standard," IEEE Transactions on Circuits and Systems for Video Technology, Vol.13, Issue. 7, pp. 620-636, Jul. 2008.
  5. S. Choi, et al., "Design of an application specific instruction set processor for a universal bitstream codec," IEICE Electronics Express, Vol. 11(2014), No. 24, pp. 20141047, Dec. 2014. https://doi.org/10.1587/elex.11.20141047
  6. S. Choi, et al., "ASiPEC: An Application Specific Instruction-Set Processor for High Performance Entropy Coding," Ubiquitous Computing Application and Wireless Sensor, pp. 67-75, Mar. 2015.
  7. I. H. Witten, et al., "Arithmetic coding for data compression," Communications of the ACM, Vol. 30, Issue. 6, pp. 520-540, June. 1987. https://doi.org/10.1145/214762.214771
  8. T. Wiegand, et al., "Overview of the H.264/AVC Video Coding Standard," IEEE Transactions on Circuits and Systems for Video Technology, Vol. 13, No. 7, pp. 560-576, Aug. 2003. https://doi.org/10.1109/TCSVT.2003.815165
  9. High Efficiency Video Coding, Rec. ITU-T H.265 and ISO/IEC 23008-2, Jan 2013
  10. G.J. Sullivan, J.-R. Ohm, W.-J. Han, and T. Wiegand, "Overview of the High Efficiency Video Coding (HEVC) standard," IEEE Trans. Circuits Syst. Video Technol., vol. 22, no. 12, pp.1648-1667, Dec. 2012.
  11. D. Zhou, J. Zhou, W. Fei, and S. Goto, "Ultra-High- Throughput VLSI Architecture of H.265/HEVC CABAC Encoder for UHDTV Applications," IEEE Transactions on circuits and systems for video technology, Vol. 25, No. 3, pp. 497-507, Mar. 2015. https://doi.org/10.1109/TCSVT.2014.2337572
  12. HM-16.5
  13. Intel64 and IA-32 Architecture Optimization Reference Manual
  14. ARM architecture reference Manual ARMv7-A and ARMv7-R edition