고효율 디지털 신호처리를 위한 근사 곱셈기 설계

  • 하민호 (포항공과대학교 전자전기공학과) ;
  • 이영주 (포항공과대학교 전자전기공학과) ;
  • 이승구 (포항공과대학교 전자전기공학과)
  • Published : 2017.06.25

Abstract

Keywords

References

  1. S. Narayanamoorthy et al., "Energy-efficient approximate multiplication for digital signal processing and clsssification applications," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2015.
  2. J. Han and M. Orshansky, "Approximate computing: an emerging paradigm for energy-efficient design," Proc. European Test Symposium (ETS), 2013.
  3. S. Mittal, "A survey of techniques for approximate computing," ACM Comput. Surv., 2016.
  4. Q. Xu et al., "Approximate computing: a survey," IEEE Design & Test, 2016.
  5. K. Bhardwaj et al., "Power- and area-efficient approximate wallace tree multiplier for error-resilience systems", Proc. Int. Symp. Quality Electronic Design (ISQED), 2014.
  6. B. Shao and P. Li, "Array-based approximate arithmetic computing: a general model and applications to multiplier and squarer design," IEEE Trans. Circuits Syst. I, Reg. Papers, 2015.
  7. G. Zervakis et al., "Hybrid approximate multiplier architectures for improved power-accuracy trade-offs," Proc. IEEE/ACM Int. Symp. Low Power Electronics and Design (ISLPED), 2015.
  8. S. Hashemi et al., "DRUM: A dynamic range unbiased multiplier for approximate applications," Proc. IEEE/ACM Int. Conf. Computer-Aided Design (ICCAD), 2015.
  9. N. Maheshwari et al., "A Design approach for compressor based approximate multipliers," Proc. Int. Conf. VLSI Design (VLSID), 2015.
  10. A. Momeni et al., "Design and analysis of approximate compressors for multiplication," IEEE Trans. Comput., 2015.
  11. Z. Yang et al., "Approximate compressors for error-resilient multiplier design," Proc. IEEE Int. Symp. Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2015.
  12. M. Shafique et al., "Cross-Layer approximate computing: from logic to architectures," Proc. ACM/EDAC/IEEE Design Automation Conf. (DAC), 2016.
  13. H. Jiang et al., "Approximate radix-8 booth multipliers for low-power and high-performance operation," IEEE Trans. Comput., 2016.
  14. R. Zendegani et al., "RoBA multiplier: a rounding-based approximate multiplier for high-speed yet energy-efficient digital signal processing," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2017.
  15. O. Akbari et al., "Dual-quality 4:2 compressors for utilizing in dynamic accuracy configurable multipliers," IEEE Trans. Very Large Scale Integr. (VLSI) Syst., 2017.
  16. W. Liu et al., "Design of approximate radix-4 booth multipliers for error-tolerant computing," IEEE Trans. Comput., 2017.
  17. S. Misailovic et al., "Quality of service profiling," Proc. ACM/IEEE International Conference on Software Engineering (ICSE), 2010.
  18. S. Liu et al., "Flikker: Saving refresh-power in mobile devices through critical data partitioning," Proc. Int. Conf. Architect. Support Programm. Lang. Oper. Syst. (ASPLOS), 2011.
  19. A. Sampson et al., "EnerJ: Approximate data types for safe and general low-power computation," Proc. Int. Conf. Programm. Lang. Design Implement. (PLDI), 2011.
  20. M. Samadi et al., "SAGE: Self-tuning approximation for graphics engines," Proc. Int. Symp. Microarchitect. (MICRO), 2013.
  21. C.-H. Chang et al., "Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits," IEEE Trans. Circuits Syst. I, Reg. Papers, 2004.