DOI QR코드

DOI QR Code

Hologram Generation Acceleration Method Using GPGPU

GPGPU를 이용한 홀로그램 생성 가속화 방법

  • Lee, Yoon-Hyuk (Dept. of Electronic Materials Engineering, Kwangwoon University) ;
  • Kim, Dong-Wook (Dept. of Electronic Materials Engineering, Kwangwoon University) ;
  • Seo, Young-Ho (Ingenium College of liberal arts, Kwangwoon University)
  • 이윤혁 (광운대학교 전자재료공학과) ;
  • 김동욱 (광운대학교 전자재료공학과) ;
  • 서영호 (광운대학교 인제니움학부대학)
  • Received : 2017.08.28
  • Accepted : 2017.10.10
  • Published : 2017.11.30

Abstract

A large amount of computation is required to generate a hologram using a computer. In order to accelerate the computation, many methods of acceleration by parallel programming using GPGPU(General Purpose computing on Graphic Process Unit) have been researched. In this paper, we propose a method of reducing the bottleneck caused by hologram pixel based parallel processing and using the shareable variables. We also propose how to optimize using Visual Profiler supported by nVidia's CUDA to make threads work optimally. The experimental results show that the proposed method reduces the calculation time by up to 40% compared with the existing research.

컴퓨터를 이용하여 홀로그램을 생성하기 위해서는 방대한 양의 계산이 필요하다. 이를 고속화하기 위해 GPGPU(General Purpose computing on Graphic Process Unit)를 이용하여 병렬 프로그래밍을 통한 고속화 방법들이 많이 연구되었다. 본 논문에서는 홀로그램 화소 기반의 병렬처리에서 생기는 병목현상을 줄이고, 공통항을 이용한 가속화 방법을 제안한다. 또한 최적의 쓰레드를 결정하기 위해 nVidia사의 CUDA와 함께 제공되는 Visual Profiler를 이용한 최적화 방법을 소개한다. 구현 결과 기존 연구 대비 최대 40%의 계산시간을 줄일 수 있었다.

Keywords

References

  1. T. Motoki, H. Isono, and I. Yuyama, "Present Status of Three-Dimensional Television Research," Proceedings of the IEEE, Vol.83, No.7, pp.1009-1021, July 1995. https://doi.org/10.1109/5.390119
  2. T. Ito, N. Masuda, K. Yoshimura, A. Shiraki, T. Shimobaba, and T. Sugie, "Special-Purpose computer HORN-5 for a real-time electroholography," Optics Express, Vol.13, No.6, pp.1923-1932, March 2005. https://doi.org/10.1364/OPEX.13.001923
  3. Y. Ichihashi, H. Nakayama, T. Ito, N, Masuda, T. Shimobaba, A, Shiraki, and T. Sugie, "HORN-6 special-purpose clustered computing system for electroholography," Optics Express, Vol.17, No.16, pp.13895-13903, August 2009. https://doi.org/10.1364/OE.17.013895
  4. Y. H. Seo, H. J. Choi, J. S. Yoo, and D. W. Kim, "An architecture of a high-speed digital hologram generator based on FPGA," Journal of Systems Architecture, Vol.56, No.1, pp.27-37, January 2010. https://doi.org/10.1016/j.sysarc.2009.11.001
  5. Y. H. Seo, H. J. Choi, J. S. Yoo, and D. W. Kim, "A New Parallelizing Algorithm and Cell-based Hardware Architecture for High-speed Generation of Digital Hologram," Journal of Broadcast Engineering, Vol.16, No.1, pp.54-63, January 2011. https://doi.org/10.5909/JEB.2011.16.1.054
  6. Y. H. Lee, Y. H. Seo, J. S. Yoo, and D. W. Kim, "Hardware architecture of high-performance digital hologram generator on the basis of a pixel-by-pixel calculation scheme," Applied Optices, Vol.51, No.18, pp.4003-4012, June 2012. https://doi.org/10.1364/AO.51.004003
  7. N. Masuda, T. Ito, T. Tanaka, A. Shiraki, and T. Sugie, "Computer generated holography using a graphics processing unit," Optics Express, Vol.14, No.2, pp.603-608, January 2006. https://doi.org/10.1364/OPEX.14.000603
  8. L. Ahrenberg, P. Benzie, M. Magnor, and J. Watson, "Computer generated holography using parallel commodity graphics hardware," Optics Express, Vol.14, No.17, pp.7636-7641, August 2006. https://doi.org/10.1364/OE.14.007636
  9. Y. Pan, X. Xu, S. Solanki, X. Liang, R. Bin, A. Tanjung, C. Tan, and T.-C. Chong, "Fast CGH computation using S-LUT on GPU," Optics Express, Vol.17, No.21, pp.18543-18555, October 2009. https://doi.org/10.1364/OE.17.018543
  10. Y. Z. Liu, J. W. Dong, Y. Y. Pu, B. C. Chen, H. X. He, and H. Z. Wang, "High-speed full analytical holographic computations for true-life scenes," Optics Express, Vol.18, No.4, pp.3345-3351, February 2010. https://doi.org/10.1364/OE.18.003345
  11. T. Shimobaba, T. Ito, N, Masuda, Y, Ichihashi, and N. Takada, "Fast calculation of computer-generated-hologram on AMD HD5000 series GPU and OpenCL," Optics Express, Vol.18, No.10, pp.9955-9960, May 2010. https://doi.org/10.1364/OE.18.009955
  12. Y. H. Lee, D. W. Kim, and Y. H. Seo, "High-Speed Generation Technique of Digital holographic Contents based on GPGPU," Journal of the Korea Society of Digital Industry and Information Management, Vol.9, No.1, pp.151-163, March 2013.
  13. J. S. Song, J. S. Park, Y. H. Seo, and J. I. Park "Fast Generation of Digital Hologram Based on Multi-GPU," Journal of Broadcast Engineering, Vol.16, No.6, pp.1009-1017, November 2011. https://doi.org/10.5909/JEB.2011.16.6.1009
  14. Y. H. Seo, Y. H. Lee, J. M. Goo, Y. Y. Kim, B. R. Kim, and D. W. Kim, "A New System Implementation for Generating Holographic Video using Natural Color Scene," Journal of Broadcast Engineering, Vol.18, No.2, pp.149-158, March 2013. https://doi.org/10.5909/JBE.2013.18.2.149
  15. Y. H. Lee, Y. H. Seo, and D. W. Kim, "Fast Hologram Generation Method Using Scheduling of Multi-GPGPUs," The Korean Institute of Broadcast and Media Engineers Summer Conference, Jeju, Korea, pp.389-390, 2016.
  16. Y. H. Seo, Y. H. Lee, and D. W. Kim, "Implementation of Parallel Computer Generated Hologram Using Multi-GPGPU," Journal of the Korea Institute of Information and Communication Engineering, Vol.18, No.5, pp.1177-1186, May 2014. https://doi.org/10.6109/jkiice.2014.18.5.1177
  17. CUDA Toolkit Documentation, http://docs.nvidia.com/cuda/
  18. NVIDIA's Next Generation CUDA Compute Architecture : Kepler GK110, http://www.nvidia.com/content/PDF/kepler/NVIDIA-Kepler-GK110-Architecture-Whitepaper.pdf