보안 칩의 물리적 공격 및 대응 기술 동향

References

1. Rostami, Mohamad, Farinaz Koushanfar, and Ramesh Karri. "A primer on hardware security: Models, methods, and metrics." Proceedings of the IEEE 102.8 (2014): 1283-1295. https://doi.org/10.1109/JPROC.2014.2335155
2. 최필주, 최원섭, 김동규, "하드웨어 칩 기반 보안시스템 및 해킹동향", 한국통신학회지, 2014. 4, 46-52 (7 pages)
3. Oliver Kommerling, Markus Kuhn, "Design Principles for Tamper-Resistant Smartcard Processors", USENIX Workshop on Smartcard Technology Proceedings, Chicago, Illinois, USA, May 10-11, 1999.
4. Briais, S., Cioranesco, J. M., Danger, J. L., Guilley, S., Naccache, D., & Porteboeuf, T. (2012, September). Random active shield. IEEE Workshop on Fault Diagnosis and Tolerance in Cryptography (FDTC), 2012 (pp. 103-113)
5. Bar-El, H., Choukri, H., Naccache, D., Tunstall, M., & Whelan, C. (2006). The sorcerer's apprentice guide to fault attacks. Proceedings of the IEEE, 94(2), 370-382. https://doi.org/10.1109/JPROC.2005.862424
6. Kocher, Paul C. "Timing attacks on implementations of Diffie-Hellman, RSA, DSS, and other systems." Advances in Cryptology-CRYPTO'96. Springer Berlin Heidelberg, 1996.
7. Kocher, P., Jaffe, J., Jun, B., & Rohatgi, P. (2011). Introduction to differential power analysis. Journal of Cryptographic Engineering, 1(1), 5-27. https://doi.org/10.1007/s13389-011-0006-y