I. INTRODUCTION
Single-phase three-level neutral point clamped (NPC) converters as grid-side converters have been widely used in various applications, such as in solar grid-connected inverters [1]-[3], uninterruptible power supplies (UPS) [4], power factor correction (PFC) [5], [6], and AC electric railway traction drive systems [7]-[9]. High-order harmonics can adversely affect converters and power supply systems. The high-order harmonics caused by grid-side converters may result in overvoltage, overheating, electromagnetic interference (EMI), and harmonic resonance in electric railway traction power systems and distributed generation systems [8], [10]-[14]. A resonance accident caused by high-order harmonics occurred in the China Beijing–Shanghai high-speed railway in January 9th, 2011 and resulted in a high amplitude peak voltage and arrester breakdown [15]. Minimal high-order harmonics caused by grid-side converters equate to minimal damage. The higher frequency of high-order harmonics, the more easier to filter.
To suppress harmonics, LC or LCL filters, which are installed in UPS and PFC converters, are widely used to mitigate high-order harmonics [5], [16]-[19]. Various types of filters are installed in traction power supply systems to deal with typical harmonic distortions [10], [12]. These methods require additional filter devices. Optimal modulation algorithms in converter control systems are viewed as alternative solutions to suppress high-order harmonics as they do not require additional hardware devices. Selective harmonic elimination pulse width modulation (SHEPWM) can generally eliminate a number of unwanted harmonics in the pulse voltage of converters [20]-[22]. However, it requires numerous complicated calculations and digital memory resources. The SHEPWM processes applied in three-level and multi-level converters are also more difficult than those applied in two-level converters.
The pulse voltage under the unipolar carrier-based pulse width modulation (CBPWM) scheme consists of two voltage levels in one switching cycle. The conventional unipolar CBPWM is widely used in single-phase three-level converters because of its simplicity [7], [8], [23]. By contrast, single-phase three-level space vector pulse width modulation (SVPWM) has been reported for the converters in [9], [24], [25]. The performance of SVPWM is equivalent to that of the conventional unipolar CBPWM [9]. The high-order harmonics caused by these modulation algorithms are mainly distributed around the switching frequency or double switching frequency. In the dipolar CBPWM scheme, the switching signal of each leg consists of three states (1 0 −1) in one switching cycle. The dipolar modulation technique has been used in three-phase matrix and NPC converters [25], [26]. However, the characteristics of the high-order harmonics of dipolar modulation have yet to be analyzed, and this dipolar modulation method cannot be directly applied in single-phase three-level converters.
In this study, dipolar modulation is applied in a single-phase three-level converter. Combining the advantages of unipolar and dipolar modulations, we propose a simple hybrid CBPWM scheme for single-phase three-level converters. The characteristics of the high-order harmonics of the proposed hybrid CBPWM scheme and those of the traditional unipolar CBPWM scheme are compared and verified.
II. SYSTEM CONFIGURATI
Fig. 1 shows the topology of a single-phase three-level NPC rectifier. In this figure, us and is denote the main voltage and line current, respectively; R and L represent the internal resistance and inductance of the grid-side inductor, respectively; C1 and C2 denote the upper and lower DC-link capacitances, respectively; RL denotes the equivalent load; and udc denotes the DC-link voltage value.
Fig. 1.Topology of a single-phase three-level NPC rectifier.
Both Gai and Gbi (i = 1, 2, 3, 4) represent the drive signals for the switching devices in legs a and b, respectively. These drive signals can be defined as
Sa and Sb denote the idealized switching functions of legs a and b, respectively. The relationship between Si and Gij (i = a, b; j = 1, 2, 3, 4) is shown in Table I. The input voltage uab of the adopted rectifier is expressed as
TABLE IRELATIONSHIP BETWEEN Si AND Gij
The states of Sa and Sb are obtained from the modulation algorithm. The reference signal ur of the modulation algorithm is the output of the control algorithm. The simplified control system structure of the adopted converter is shown in Fig. 2.
Fig. 2.Simplified control system structure of the adopted converter.
III. MODULATION SCHEMES
The ranges of the normalized modulation reference signal ur can be divided into the following four regions:
Assuming that the switching frequency fs is significantly higher than the modulation signal frequency, then ur can be considered as a constant in each switching cycle.
A. Traditional Unipolar CBPWM
ura and urb denote the modulation reference signals of legs a and b, respectively, and satisfy
In a traditional single-phase three-level unipolar CBPWM algorithm, two triangle carriers (C+ and C−) and modulating signals are compared to generate the switching function states and drive pulses of an NPC converter. The principle of the unipolar CBPWM algorithm can be defined as
The switching function of each leg in the adopted unipolar CBPWM algorithm consists of state 0 and another state (1 or −1) in one switching cycle. Fig. 3 shows a traditional single-phase three-level unipolar CBPWM algorithm in one switching cycle Ts when ur lies in four regions. The input voltage uab also comprises two voltage levels in one switching cycle. As shown in Fig. 4, uab is the waveform in a complete modulation cycle, and uab is an approximate sinusoidal pulse waveform for obtaining good high-order harmonic characteristics. As indicated in the diagram of current is in Fig. 3, the current is changes with the voltage uab level step, and the high-order harmonics caused by the unipolar CBPWM are mainly distributed around the double switching frequency.
Fig. 3.Traditional unipolar CBPWM algorithm in one switching cycle Ts. (a) Region I. (b) Region II. (c) Region III. (d) Region IV.
Fig. 4.Traditional unipolar CBPWM algorithm in a complete modulation cycle.
B. Dipolar CBPWM
Fig. 5 shows the single-phase three-level dipolar CBPWM algorithm designed in this work. urap and urbp denote the positive modulation signals for legs a and b, respectively; uran and urbn denote the negative modulation signals for legs a and b, respectively; and λ refers to the separation coefficient with the range 0 < λ < 1 and satisfies
Fig. 5.Proposed single-phase three-level dipolar CBPWM algorithm in one switching cycle Ts. (a) Region I. (b) Region II. (c) Region III. (d) Region IV.
The principle of the dipolar CBPWM algorithm can be expressed as
Modulation depth m is the amplitude of the modulation signal ur. To prevent modulation signals from entering the overmodulation region, the separation coefficient λ should meet Equ. (8).
As shown in Fig. 3, the state sequence of switching functions Sa and Sb under the unipolar CBPWM scheme is 1→0→1 or 0→−1→0 in one switching cycle. By contrast, Fig. 5 shows that the state sequence of switching functions Sa and Sb under the dipolar CBPWM scheme is 1→0→−1→0→1 in one switching cycle. Table II shows the states of the switching devices of the proposed dipolar CBPWM and traditional unipolar CBPWM (1→0→1 as an example) schemes in one switching cycle Ts. Turning on and off actions occur for half of the switching devices in one switching cycle under the unipolar CBPWM scheme. No turning action occurs for switching devices Gi2 and Gi4 when the sequence is 1→0→1. Similarly, no turning action occurs for switching devices Gi1 and Gi3 when the sequence is 0→−1→0. However, under the dipolar CBPWM scheme, turning on and off actions occur for each switching device in one switching cycle. Moreover, the desired switching frequency does not increase. However, the total number of switching commutations is twice that under the unipolar CBPWM scheme.
TABLE IISWITCHING STATE OF EACH LEG (i = a, b)
Assuming that u1 = u2 = 0.5udc. T1 is defined as the duty time of state uab = udc, T0.5 is the duty time of state uab = 0.5udc, T0 is the duty time of state uab = 0, T−0.5 is the duty time of state uab = −0.5udc, and T−1 is the duty time of state uab = −udc. When ur lies in region II, solving the same triangle as that in Fig. 5(b) yields
where the lengths of Tx, Ty, and Tz are shown in Fig. 5(b).
Thus, in region II, T1, T0.5, and T0 can be deduced from Equ. (9) and Fig. 5(b) as
Vr is the average reference voltage, and Vab is the average value of voltage uab in one switching cycle. Vr is equal to urTsudc. When ur lies in region II, Vab can be expressed as Equ. (11). When ur is in the other three regions, the same Vab = Vr can be deduced. Thus, the dipolar modulation meets the volt-second balance principle.
Fig. 5(b) shows that if Tx < Ty, then voltage uab in region II and region III is composed of two voltage levels during one switching cycle. By solving the similar triangle in Fig. 5(b) on the basis of Equ. (9), the range of ur can be expressed as
The waveform of uab in a complete modulation cycle is depicted in Fig. 6. In Fig. 6, uab presents a terrible sinusoidal pulse waveform. When ur does not satisfy Equ. (12), the variation rate of current is with the voltage uab level step is larger than that under the unipolar CBPWM scheme in the comparison of the diagrams of current is in Fig. 5 and Fig. 3. Thus, the dipolar CBPWM scheme achieves worse high-order harmonic characteristics compared with the unipolar CBPWM scheme.
Fig. 6.Dipolar CBPWM algorithm in a complete modulation cycle.
C. Hybrid CBPWM
To improve the utilization of switching frequency and achieve good high-order harmonic characteristics, we propose a hybrid CBPWM scheme, which is based on the dipolar and unipolar CBPWM schemes. According to the region of modulation signal ur, the hybrid CBPWM scheme is divided into unipolar and dipolar modes.
When the voltage uab consists of two voltage levels in each region, the hybrid CBPWM scheme is similar to the unipolar CBPWM scheme. Modulation depth m is the amplitude of modulation signal ur. The modulation depth of the adopted converter usually meets m > 0.5 in a steady state. If |2λ−1| ≥ 0.5, and ur satisfies Equ. (12). In this case, switching functions Sa and Sb present dipolar characteristics, and the hybrid CBPWM operates in dipolar mode. The modulation process is shown in Fig. 7. The pulse number of voltage uab in the hybrid CBPWM is twice that in the unipolar CBPWM. When the hybrid CBPWM operates in dipolar mode, the high-order harmonics caused by the hybrid CBPWM are mainly distributed around the quadruple switching frequency.
Fig. 7.Hybrid CBPWM in dipolar mode. (a) ur > 0. (b) ur < 0.
When |ur| ≥ |2λ−1|, λ ≤ 0.25, or λ≥0.75 because |2λ−1| ≥ 0.5. If ur lies in region I or region IV (Fig. 5), then uab consists of three voltage levels in one switching cycle when λ ≤ 0.25. Thus, λ ≥ 0.75 is chosen in the hybrid CBPWM. The modulation process is shown in Fig. 8(a).
Fig. 8.Hybrid CBPWM in unipolar mode. (a) Without compensation. (b) With compensation.
The modulation signals urap and urbn lie in the nonlinear overmodulation region, as shown in Fig. 8(a) because ur ≥ 2λ−1 ≥ 0.5 in region I and λ ≥ 0.75. Assuming that urap = 1+x in Fig. 8(a), we can express Vab as Equ. (13), Vab ≠ Vr. The modulation algorithm in the overmodulation region does not satisfy the volt-second balance principle. Thus, a compensation algorithm shown in Equs. (14) and (15) is designed to solve this problem. The modulation process is shown in Fig. 8(b).
By solving a similar triangle in Fig. 8(b) with Equs. (14) and (15), we can express Vab as
The expression Vab = Vr can also be proved when ur lies in region IV. The hybrid modulation scheme with the overmodulation compensation satisfies the volt-second balance principle. In this case, switching functions Sa and Sb present unipolar characteristics, and the hybrid CBPWM operates in unipolar mode. When the hybrid CBPWM operates in unipolar mode, the high-order harmonics caused by the hybrid CBPWM are mainly distributed around the double switching frequency.
In a complete modulation cycle, the modulated reference signal enters the overmodulation region as the magnitude of the modulated signal increases. This effect indicates that the hybrid modulation scheme switches from a dipolar mode to a unipolar mode. The unipolar mode satisfies
According to the aforementioned analysis, meeting λ ≥ 0.75 is necessary in the proposed hybrid CBPWM. From Equ. (17), the selection rule of operation modes in the hybrid modulation scheme can be defined as
The hybrid CBPWM algorithm in a complete modulation cycle is shown in Fig. 9. When the modulation depth m is constant, a large λ equates to a large operation range for the unipolar mode. The high-order harmonics around the quadruple switching frequency in dipolar mode is easier to filter and less harmful than the high-order harmonics around the double switching frequency in unipolar mode. Therefore, from the aspect of the overall high-order harmonics, λ = 0.75 is the best choice. At this point, the operation range of the dipolar mode reaches the maximum value. Fig. 10 shows the curve of voltage uab at λ = 0.75 in the hybrid CBPWM algorithm in a complete modulation cycle.
Fig. 9.Hybrid CBPWM algorithm in a complete modulation cycle.
Fig. 10.Hybrid CBPWM algorithm in a complete modulation cycle at λ = 0.75.
As indicated in Equ. (18), if λ = 1, 2−2λ = 0, then the formula |ur| ≥ 2−2λ is always true in a complete modulation cycle, i.e., the proposed hybrid CBPWM scheme remains in unipolar mode for all regions. The proposed hybrid CBPWM scheme is equivalent to the traditional unipolar CBPWM scheme when λ = 1.
D. Neutral-Point Voltage Balancing Control
When the hybrid CBPWM operates in unipolar mode, the neutral-point voltage balancing control method that involves injecting an offset voltage uz into the modulation signals [7] is adopted in this work. The modified modulation signals ura and urb can be rewritten as Equ. (19).
When the hybrid CBPWM operates in dipolar mode, a similar method can be used to control the neutral-point voltage balancing. The modified modulation signals urap, uran, urbp, and urbn can be rewritten as Equ. (20). uz is used to adjust the duty ratios of redundant states to achieve the intended neutral-point voltage balancing control.
IV. EXPERIMENTAL RESULTS
An experimental prototype with a digital signal processor (DSP) TMS320F28335 controller is built to verify the validity and effectiveness of the proposed dipolar and hybrid CBPWM schemes. The parameters of the experimental system are shown in Table III.
TABLE IIISYSTEM PARAMETERS
Fig. 11(a) and (b) show the experimental waveforms of the adopted single-phase three-level converter under the proposed dipolar and hybrid CBPWM schemes, respectively. All these modulation schemes can achieve the control goals of the converter: the unit power factor and the desired constant DC-link voltage. As a result of the inductance of an autotransformer as power supply in the experimental prototype, some harmonic components can be observed in the main voltage us.
Fig. 11.Experimental waveforms of the adopted single-phase three-level converter. (a) Adopted dipolar CBPWM. (b) Proposed hybrid CBPWM.
Fig. 12 present the experimental results of the line current is and pulse voltage uab in the adopted converter under different CBPWM schemes with the same system parameters in Table III. Different modulation schemes are adopted to achieve the same control target. Fig. 13 illustrates the enlarged view of the red oval in Fig. 12 and verifies that the line current is changes with the pulse voltage uab. Such change is gradually reduced when the following modulation schemes are adopted: (a) dipolar CBPWM, (b) traditional unipolar CBPWM, (c) proposed hybrid CBPWM at λ = 0.8, and (d) proposed hybrid CBPWM at λ = 0.75.
Fig. 12.Experimental results of the current is and voltage uab in the adopted converter. (a) Dipolar CBPWM. (b) Traditional unipolar CBPWM. (c) Proposed hybrid CBPWM at λ = 0.8. (d) Proposed hybrid CBPWM at λ = 0.75.
Fig. 13.Enlarged view of the current is and voltage uab in Fig. 12. (a) Dipolar CBPWM. (b) Traditional unipolar CBPWM. (c) Proposed hybrid CBPWM at λ = 0.8. (d) Proposed hybrid CBPWM at λ = 0.75.
The pulse voltage uab in the most modulation range consists of three voltage levels in one switching cycle when the dipolar CBPWM scheme is adopted. The variation rate of current is with the voltage uab step under this scheme is larger than the variation rates under the other modulation schemes. Such large variation results in an increase in the high-order harmonic components of the dipolar CBPWM scheme. In the same switching frequency, the proposed hybrid CBPWM scheme increases the pulse number of voltage uab in comparison with the traditional unipolar CBPWM scheme. The coefficient λ is in the range of 0.75 ≤ λ ≤ 1; a small coefficient λ equates to a large number of pulses and to minimal line current ripples.
Fig. 14 shows the fast Fourier transform (FFT) analysis results of the line current is in Fig. 12. The high-order harmonic components of the line current are gradually reduced when the following modulation schemes are adopted: (a) dipolar CBPWM, (b) traditional unipolar CBPWM, (c) proposed hybrid CBPWM at λ = 0.8, and (d) proposed hybrid CBPWM at λ = 0.75. The control delay interval caused by the loading modulation signal ur spans one switching cycle in the DSP controller. Hence, the modulation signal ur is discretized with the switching frequency fs. Thus, the line current is contains the harmonic components distributed around the switching frequency (fs = 1.25 kHz).
Fig. 14.FFT analysis of the experimental results for current is of the adopted converter. (a) Dipolar CBPWM. (b) Traditional unipolar CBPWM. (c) Proposed hybrid CBPWM at λ = 0.8. (d) Proposed hybrid CBPWM at λ = 0.75.
The experimental results in Figs. 12–14 verify the validity of the aforementioned analysis. The high-order harmonic components of current is are the largest when the dipolar CBPWM scheme is adopted. The proposed hybrid CBPWM scheme can reduce the high-order harmonics around the double switching frequency. The comparison of Figs. 14(c) and 14(d) shows that a small λ equates to low high-order harmonic components in the range of λ ≥ 0.75. These experimental results verify that the high-order harmonic components can reach the minimum value at λ = 0.75, which coincides with the abovementioned theoretical analysis results.
Fig. 15 and Fig. 16 show the conducted EMI experimental results of the traditional unipolar CBPWM scheme and the proposed hybrid CBPWM scheme at λ = 0.75, respectively. The blue line represents the peak detector (PK), and the green line denotes the average detector (AV). Fig. 15 and Fig. 16 also indicate that the large EMI noises are distributed around the double switching frequency (2.5 kHz) and quadruple switching frequency (5 kHz) when the traditional unipolar CBPWM scheme is adopted. The large EMI noises are only distributed around the quadruple switching frequency (5 kHz) when the proposed hybrid CBPWM scheme is adopted. However, the maximum EMI noise can reach 95 dBμA, which is the same as that in the traditional unipolar CBPWM scheme. Nevertheless, the proposed method can transfer the EMI noise around the double switching frequency (2.5 kHz) to the quadruple switching frequency (5 kHz).
Fig. 15.EMI experimental results of the traditional unipolar CBPWM scheme.
Fig. 16.EMI experimental results of the proposed hybrid CBPWM scheme.
V. CONCLUSION
A single-phase three-level dipolar CBPWM scheme is designed in this work. On the basis of the dipolar CBPWM scheme, a novel hybrid CBPWM scheme that combines unipolar and dipolar modulations is proposed. Unlike the traditional unipolar CBPWM scheme, the proposed dipolar and hybrid CBPWM schemes have the following salient features.
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