JSTS:Journal of Semiconductor Technology and Science

The Institute of Electronics and Information Engineers (대한전자공학회)
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Low-Power Write-Circuit with Status-Detection for STT-MRAM

  • Shin, Kwang-Seob (Dept. of Electronics and Computer Engineering, Hanyang University) ;
  • Im, Saemin (Dept. of Electronics and Computer Engineering, Hanyang University) ;
  • Park, Sang-Gyu (Dept. of Electronics and Computer Engineering, Hanyang University)
  • Received : 2015.04.08
  • Accepted : 2015.12.06
  • Published : 2016.02.28
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Abstract

We report a STT-MRAM write-scheme, in which the length of the write-pulse is determined dynamically by sensing the status of MTJ cells. The proposed scheme can reduce the power consumption by eliminating unnecessary writing current after the switching has occurred. We also propose a reference cell design, which is optimized for the use in write-circuits. The performance of the proposed circuit was verified by SPICE level simulations of the circuit implemented in a $0.13{\mu}m$ CMOS process.

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References

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