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LDPC Decoding by Failed Check Nodes for Serial Concatenated Code

  • Yu, Seog Kun (School of Electronics Engineering, Kyungpook National University) ;
  • Joo, Eon Kyeong (School of Electronics Engineering, Kyungpook National University)
  • 투고 : 2014.01.23
  • 심사 : 2014.11.04
  • 발행 : 2015.02.01

초록

The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum-product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of $10^{-8}$. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.

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참고문헌

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