정보처리학회논문지:컴퓨터 및 통신 시스템 (KIPS Transactions on Computer and Communication Systems)

  • 제4권5호
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  • Pages.147-152
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  • 2015
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  • 2287-5891(pISSN)
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  • 2734-049X(eISSN)
한국정보처리학회 (Korea Information Processing Society)
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간헐적 동기화를 통한 예측기반 병렬 로직 시뮬레이션에서의 체크포인트/재실행 오버헤드 최소화

Checkpoint/Resimulation Overhead Minimization with Sporadic Synchronization in Prediction-Based Parallel Logic Simulation

  • 곽두환 (부산대학교 전자전기컴퓨터공학과) ;
  • 양세양 (부산대학교 정보컴퓨터공학부)
  • 투고 : 2014.10.22
  • 심사 : 2015.03.18
  • 발행 : 2015.05.31
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초록

일반적으로 병렬 이벤트구동 시뮬레이션의 대표적 동기화 방법으로는 비관적 동기화 방식과 낙관적 동기화 방식이 있는데, 본 논문에서는 예측기반 병렬 이벤트구동 로직 시뮬레이션에서 이 두 가지 동기화 방식들을 혼용한 간헐적 동기화를 통한 시뮬레이션 성능 향상 기법을 제시한다. 제안되는 간헐적 동기화 방식은 예측기반 병렬 이벤트구동 로직 시뮬레이션에서 자주 일어나는 틀린 예측과 연관된 체크포인트 오버헤드 및 재실행 오버헤드를 최소화할 수 있어 시뮬레이션 성능 향상에 매우 효과적인데, 이를 다양한 실제 디자인들에 적용한 실험을 통하여 확인할 수 있었다.

In general, there are two synchronization methods in parallel event-driven simulation, pessimistic approach and optimistic approach. In this paper, we propose a new approach, sporadic synchronization combining both for prediction-based parallel event-driven logic simulation. We claim this hybrid solution is pretty effective to minimize both checkpoint overhead and restart overhead, which are related problems with frequent false predictions for improving the performance of the prediction-based parallel event-driven logic simulation. The experiment has clearly shown the advantage of the proposed approach.

키워드

참고문헌

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