DOI QR코드

DOI QR Code

전력증폭기의 효율 및 선형성 개선을 위한 포락선 제거 및 복원 송신기

Envelope Elimination and Restoration Transmitter for Efficiency and Linearity Improvement of Power Amplifier

  • 조영균 (한국전자통신연구원 통신인터넷연구부문) ;
  • 김창완 (동아대학교 전자공학과) ;
  • 박봉혁 (한국전자통신연구원 통신인터넷연구부문)
  • 투고 : 2014.12.24
  • 심사 : 2015.03.10
  • 발행 : 2015.03.31

초록

본 논문에서는 3-레벨 인코딩 기법을 적용하여 시스템의 효율과 선형성을 개선할 수 있는 새로운 구조의 EER 송신기를 제안하였다. 제안된 송신기는 첨두 전력 대 평균 전력비에 상관없이 동일한 크기의 신호만을 증폭하고, 채널대역 내의 양자화 노이즈를 감소시켜 높은 효율을 얻을 수 있으며, 포락선 신호와 위상 신호 간 시간 부정합 특성을 개선하여 높은 선형성을 가질 수 있도록 하였다. 130 nm CMOS 공정으로 제작된 송신기 칩은 8.5 dB의 첨두 전력 대 평균전력비를 갖는 LTE 20 MHz 신호에 대해 2.13 GHz의 반송주파수에서 3.7 %의 오류 벡터 크기와 37.5 dBc의 인접 채널 누설비 특성을 보인다.

An envelope elimination and restoration transmitter that uses a tri-level envelope encoding scheme is presented for improving the efficiency and linearity of the system. The proposed structure amplifies the same magnitude signal regardless of the input peak-to-average power ratio and reduces the quantization noise by spreading out the noise to the out-of-band frequency, resulting in the enhancement of power efficiency. An improved linearity is also obtained by providing a new timing mismatch calibration technique between the envelope and phase signal. Implementation in a 130 nm CMOS process, transmitter measurements on a 20-MHz long-term evolution input signal show an error vector magnitude of 3.7 % and an adjacent channel leakage ratio of 37.5 dBc at 2.13 GHz carrier frequency.

키워드

참고문헌

  1. L. R. Kahn, "Single sideband transmission by envelope elimination and restoration", in Proc. IRE, vol. 40, no. 7, pp. 803-806, 1952. https://doi.org/10.1109/JRPROC.1952.273844
  2. Y. Wang, "An improved Kahn transmitter architecture based on delta-sigma modulation", in IEEE MTT-S Int. Microw. Symp. Dig., pp. 1327-1330, 2003.
  3. P. Reynaert, M. S. J. Steyaert, "A 1.75-GHz polar modulated CMOS RF power amplifier for GSM-EDGE", IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2598-2608, Dec. 2005. https://doi.org/10.1109/JSSC.2005.857425
  4. M. Nielsen, T. Larsen, "A transmitter architecture based on delta-sigma modulation and switch-mode power amplifier", IEEE Trans. Circuits Syst. II, vol. 54, no. 8, pp. 735-739, 2007. https://doi.org/10.1109/TCSII.2007.899457
  5. S. Hori, K. Kunihiro, K. Takahashi, and M. Fukaishi, "A 0.7-3 GHz envelope ${\Delta}{\Sigma}$ modulator using phase modulated carrier clock for multimode/band switching amplifiers", in IEEE RFIC Symp. Dig., pp. 1-4, 2011.
  6. J. H. Kim, S. J. Lee, J. H. Jung, and C. S. Park, "60 % high-efficiency 3 G LTE power amplifier with three-level delta-sigma modulation assisted by dual supply injection", in IEEE MTT-S Int. Microw. Symp. Dig., pp. 1-4, 2011.
  7. Y. Seo, Y. -K. Cho, S. G. Choi, and C. Kim, "3-level envelope delta-sigma modulation RF signal generator for high-efficiency transmitters", ETRI Journal, vol. 36, no. 6, pp. 924-930, 2014. https://doi.org/10.4218/etrij.14.0114.0176
  8. A. Kavousian, D. K. Su, M. Hekmat, A. Shirvani, and B. A. Wooley, "A digitally modulated polar CMOS power amplifier with a 20-MHz channel bandwidth", IEEE J. Solid-State Circuits, vol. 43, no. 10, pp. 2251-2258, Oct. 2008. https://doi.org/10.1109/JSSC.2008.2004338
  9. P. A. J. Nuyts, P. Singerl, F. Dielacher, P. Peynaert, and W. Dehaene, "A fully digital delay line based GHz range multimode transmitter front-end in 65-nm CMOS", IEEE J. Solid-State Circuits, vol. 47, no. 7, pp. 1681-1692, Jul. 2012. https://doi.org/10.1109/JSSC.2012.2191032
  10. R. Schreier, "The delta-sigma toolbox version 7.1", http://mathworks.com/matlabcentral/fileexchange
  11. P. A. J. Nuyts, B. Francois, W. Dehaene, and P. Peynaert, "A CMOS burst-mode transmitter with watt-level RF PA and flexible fully digital front-end", IEEE Trans. Circuits Syst. II, vol. 59, no. 10, pp. 613-617, 2012. https://doi.org/10.1109/TCSII.2012.2213365